On Mon, Jun 17, 2019 at 05:42:45PM +0100, Sylvia Taylor wrote: > Updating patch with missing scan-assembler checks.
This is OK. I committed it on your behalf as r273703. Thanks, James > Cheers, > Syl > > -----Original Message----- > From: Sylvia Taylor > Sent: 04 June 2019 12:24 > To: James Greenhalgh <james.greenha...@arm.com> > Cc: Richard Earnshaw <richard.earns...@arm.com>; Marcus Shawcroft > <marcus.shawcr...@arm.com>; gcc-patches@gcc.gnu.org; nd <n...@arm.com> > Subject: RE: [patch][aarch64]: add usra and ssra combine patterns > > Hi James, > > I've managed to remove the odd redundant git diff change. > > Regarding aarch64_<sur>sra_n<mode>, this patch shouldn't affect it. > > I am also not aware of any way of enabling this combine inside the pattern > used for those intrinsics, so I kept them separate. > > Cheers, > Syl > > -----Original Message----- > From: James Greenhalgh <james.greenha...@arm.com> > Sent: 03 June 2019 11:20 > To: Sylvia Taylor <sylvia.tay...@arm.com> > Cc: Richard Earnshaw <richard.earns...@arm.com>; Marcus Shawcroft > <marcus.shawcr...@arm.com>; gcc-patches@gcc.gnu.org; nd <n...@arm.com> > Subject: Re: [patch][aarch64]: add usra and ssra combine patterns > > On Thu, May 30, 2019 at 03:25:19PM +0100, Sylvia Taylor wrote: > > Greetings, > > > > This patch adds support to combine: > > > > 1) ushr and add into usra, example: > > > > ushr v0.16b, v0.16b, 2 > > add v0.16b, v0.16b, v2.16b > > --- > > usra v2.16b, v0.16b, 2 > > > > 2) sshr and add into ssra, example: > > > > sshr v1.16b, v1.16b, 2 > > add v1.16b, v1.16b, v3.16b > > --- > > ssra v3.16b, v1.16b, 2 > > > > Bootstrapped and tested on aarch64-none-linux-gnu. > > > > Ok for trunk? If yes, I don't have any commit rights, so can someone > > please commit it on my behalf. > > This patch has an unrelated change to > aarch64_get_lane_zero_extend<GPI:mode><VDQQH:mode> Please revert that and > resend. > > What changes (if any) should we make to aarch64_<sur>sra_n<mode> based on > this patch, and to the vsra_n intrinsics in arm_neon.h ? > > Thanks, > James > > > > > Cheers, > > Syl > > > > gcc/ChangeLog: > > > > 2019-05-30 Sylvia Taylor <sylvia.tay...@arm.com> > > > > * config/aarch64/aarch64-simd.md > > (*aarch64_simd_sra<mode>): New. > > * config/aarch64/iterators.md > > (SHIFTRT): New iterator. > > (sra_op): New attribute. > > > > gcc/testsuite/ChangeLog: > > > > 2019-05-30 Sylvia Taylor <sylvia.tay...@arm.com> > > > > * gcc.target/aarch64/simd/ssra.c: New test. > > * gcc.target/aarch64/simd/usra.c: New test. >
