[PATCH 2/4] rs6000: Make lwa_operand use any_memory_operand

[Segher Boessenkool]

Testcase from comex, see https://lwn.net/Articles/793932/ .


2019-07-20  Segher Boessenkool  <seg...@kernel.crashing.org>

        * config/rs6000/predicates.md (lwa_operand): Allow volatile memory.

gcc/testsuite/
        * gcc.target/powerpc/volatile-mem.c: New testcase.

---
 gcc/config/rs6000/predicates.md                 |  2 +-
 gcc/testsuite/gcc.target/powerpc/volatile-mem.c | 16 ++++++++++++++++
 2 files changed, 17 insertions(+), 1 deletion(-)
 create mode 100644 gcc/testsuite/gcc.target/powerpc/volatile-mem.c

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 13c7c02..23d626b 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -929,7 +929,7 @@ (define_predicate "lwa_operand"
 
   if (gpc_reg_operand (inner, mode))
     return true;
-  if (!memory_operand (inner, mode))
+  if (!any_memory_operand (inner, mode))
     return false;
 
   addr = XEXP (inner, 0);
diff --git a/gcc/testsuite/gcc.target/powerpc/volatile-mem.c 
b/gcc/testsuite/gcc.target/powerpc/volatile-mem.c
new file mode 100644
index 0000000..c8a7444
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/volatile-mem.c
@@ -0,0 +1,16 @@
+/* { dg-options "-O2 -std=c11" } */
+/* { dg-require-effective-target lp64 } */
+
+/* This tests if the instructions used for C atomic are optimised properly
+   as atomic by the target code, too.  */
+
+#include <stdatomic.h>
+
+int load(_Atomic int *ptr)
+{
+        return atomic_load_explicit(ptr, memory_order_relaxed);
+}
+
+/* There should be only two machine instructions, an lwa and a blr: */
+/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 2 } } */
+/* { dg-final { scan-assembler-times {\mlwa\M} 1 } } */
-- 
1.8.3.1