Operand constraints accept only register and immediate operands, so
adjust operand predicate to reject memory operands.
2019-07-14 Uroš Bizjak <[email protected]>
* config/i386/i386.md (nonmemory_szext_operand): New mode attribute.
(test<mode>_ccno_1): Macroize insn pattern from testsi_ccno_1
and testdi_ccno_1 using SWI48 mode attribute.
(*testdi_1): Use x86_64_szext_nonmemory_operand instead of
x86_64_szext_general_operand.
(*testqi_1_maybe_si): Use nonmemory_operand instead of general_operand.
(*test<mode>_1): Use nonmemory_szext_operand mode attribute
instead of genera_operand mode attribute.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index db5fa9ae3cae..58797baa6dc5 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1122,6 +1122,12 @@
(SI "x86_64_szext_general_operand")
(DI "x86_64_szext_general_operand")])
+(define_mode_attr nonmemory_szext_operand
+ [(QI "nonmemory_operand")
+ (HI "nonmemory_operand")
+ (SI "x86_64_szext_nonmemory_operand")
+ (DI "x86_64_szext_nonmemory_operand")])
+
;; Immediate operand predicate for integer modes.
(define_mode_attr immediate_operand
[(QI "immediate_operand")
@@ -8118,11 +8124,12 @@
;; On Pentium, "test imm, reg" is pairable only with eax, ax, and al.
;; Note that this excludes ah.
-(define_expand "testsi_ccno_1"
+(define_expand "test<mode>_ccno_1"
[(set (reg:CCNO FLAGS_REG)
(compare:CCNO
- (and:SI (match_operand:SI 0 "nonimmediate_operand")
- (match_operand:SI 1 "x86_64_nonmemory_operand"))
+ (and:SWI48
+ (match_operand:SWI48 0 "nonimmediate_operand")
+ (match_operand:SWI48 1 "<nonmemory_szext_operand>"))
(const_int 0)))])
(define_expand "testqi_ccz_1"
@@ -8131,23 +8138,14 @@
(match_operand:QI 1 "nonmemory_operand"))
(const_int 0)))])
-(define_expand "testdi_ccno_1"
- [(set (reg:CCNO FLAGS_REG)
- (compare:CCNO
- (and:DI (match_operand:DI 0 "nonimmediate_operand")
- (match_operand:DI 1 "x86_64_szext_general_operand"))
- (const_int 0)))]
- "TARGET_64BIT && !(MEM_P (operands[0]) && MEM_P (operands[1]))")
-
(define_insn "*testdi_1"
[(set (reg FLAGS_REG)
(compare
(and:DI
(match_operand:DI 0 "nonimmediate_operand" "%!*a,r,!*a,r,rm")
- (match_operand:DI 1 "x86_64_szext_general_operand" "Z,Z,e,e,re"))
+ (match_operand:DI 1 "x86_64_szext_nonmemory_operand" "Z,Z,e,e,re"))
(const_int 0)))]
- "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)
- && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)"
"@
test{l}\t{%k1, %k0|%k0, %k1}
test{l}\t{%k1, %k0|%k0, %k1}
@@ -8163,12 +8161,12 @@
(compare
(and:QI
(match_operand:QI 0 "nonimmediate_operand" "%!*a,q,qm,r")
- (match_operand:QI 1 "general_operand" "n,n,qn,n"))
+ (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
(const_int 0)))]
- "!(MEM_P (operands[0]) && MEM_P (operands[1]))
- && ix86_match_ccmode (insn,
- CONST_INT_P (operands[1])
- && INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)"
+
+ "ix86_match_ccmode (insn,
+ CONST_INT_P (operands[1])
+ && INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)"
{
if (which_alternative == 3)
{
@@ -8188,10 +8186,9 @@
(compare
(and:SWI124
(match_operand:SWI124 0 "nonimmediate_operand" "%!*a,<r>,<r>m")
- (match_operand:SWI124 1 "<general_operand>" "<i>,<i>,<r><i>"))
+ (match_operand:SWI124 1 "<nonmemory_szext_operand>" "<i>,<i>,<r><i>"))
(const_int 0)))]
- "ix86_match_ccmode (insn, CCNOmode)
- && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+ "ix86_match_ccmode (insn, CCNOmode)"
"test{<imodesuffix>}\t{%1, %0|%0, %1}"
[(set_attr "type" "test")
(set_attr "modrm" "0,1,1")
