On Wed, Jun 26, 2019 at 10:35:00AM +0100, Joel Hutton wrote: > Ping, plus minor rework (mostly non-functional changes) > > gcc/ChangeLog: > > 2019-06-12 Joel Hutton <joel.hut...@arm.com> > > * config/aarch64/aarch64-protos.h (aarch64_fpconst_pow2_recip): New > prototype > * config/aarch64/aarch64.c (aarch64_fpconst_pow2_recip): New function > * config/aarch64/aarch64.md > (*aarch64_<su_optab>cvtf<fcvt_target><GPF:mode>2_mult): New pattern
Cool; I learned a new instruction! > (*aarch64_<su_optab>cvtf<fcvt_iesize><GPF:mode>2_mult): New pattern > * config/aarch64/constraints.md (Dt): New constraint > * config/aarch64/predicates.md (aarch64_fpconst_pow2_recip): New > predicate > > gcc/testsuite/ChangeLog: > > 2019-06-12 Joel Hutton <joel.hut...@arm.com> > > * gcc.target/aarch64/fmul_scvtf_1.c: New test. This testcase will fail on ILP32 targets where unsigned long will still live in a 'w' register. Thanks, James
