On Wed, May 22, 2019 at 8:41 PM Iain Sandoe <i...@sandoe.co.uk> wrote:
>
> As Dominque noted in PR 64895, somewhere between revisions
> r244915 and r244957 we see the fuse-caller-save* tests started to
> XPASS on Darwin, which is a PIC target by default.
>
> The XFAILed parts of the tests never seem to be exercised on
> Linux, and therefore the change would be unnoticed there.
>
> I have attached an analysis to the PR of the latest codegen from Linux
> (which is identical to Darwin modulo the syntactic differences of PIC
> accesses on the m32 platforms).
>
> AFAICT, from the thread in the PR, codegen now seems to be correct.
> Even if the codegen is still not right, the test conditions need amendment
> to reflect the current status quo (and the XFAILs are no longers needed).
>
> One test requires amendment for the PIC case on Linux, the remainer
> of the changes are removals of the XFAILs.
>
> With the attached patch both Linux and Darwin show 17 / 18 passes m32 / m64.
>
> OK for trunk?
These changes are OK as long as they don't regress HJ's x86_64 and
i686 autotesters. Double points if they also fix -fpic failures. ;)
> Relevant branch(es)?
After a couple of days in mainline, if there are no autotester
regressions. Otherwise your call.
Thanks,
Uros.
>
> Iain
>
> gcc/testsuite/
>
> PR rtl-optimisation/64895
> * gcc.target/i386/fuse-caller-save-rec.c: Remove XFAILs.
> * gcc.target/i386/fuse-caller-save.c: Likewise.
> * gcc.target/i386/fuse-caller-save-xmm.c: Adjust tests for
> PIC cases, remove XFAILs.
>
> diff --git a/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c
> b/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c
> index 7abcf91..e8d4efb 100644
> --- a/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c
> +++ b/gcc/testsuite/gcc.target/i386/fuse-caller-save-rec.c
> @@ -18,14 +18,12 @@ foo (int y)
> return y + bar (y);
> }
>
> -/* For !nonpic && ia32 xfails, see PR64895. */
> -
> /* Check that no registers are saved/restored. */
> -/* { dg-final { scan-assembler-not "push" { xfail { { ! nonpic } && ia32 } }
> } } */
> -/* { dg-final { scan-assembler-not "pop" { xfail { { ! nonpic } && ia32 } }
> } } */
> +/* { dg-final { scan-assembler-not "push" } } */
> +/* { dg-final { scan-assembler-not "pop" } } */
>
> /* Check that addition uses dx. */
> -/* { dg-final { scan-assembler-times "addl\t%\[re\]?dx, %\[re\]?ax" 1 {
> xfail { { ! nonpic } && ia32 } } } } */
> +/* { dg-final { scan-assembler-times "addl\t%\[re\]?dx, %\[re\]?ax" 1 } } */
>
> /* Verify that bar is self-recursive. */
> /* { dg-final { scan-assembler-times "call\t_?bar" 2 } } */
> diff --git a/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c
> b/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c
> index c2d0544..02a5f5b 100644
> --- a/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c
> +++ b/gcc/testsuite/gcc.target/i386/fuse-caller-save-xmm.c
> @@ -15,13 +15,18 @@ foo (v2df y)
> return y + bar (y);
> }
>
> -/* For !nonpic && ia32 xfails, see PR64895. */
> -
> /* Check presence of all insns on xmm registers. These checks are expected
> to
> pass with both -fipa-ra and -fno-ipa-ra. */
> -/* { dg-final { scan-assembler-times "addpd\t\\.?LC0.*, %xmm0" 1 } } */
> -/* { dg-final { scan-assembler-times "addpd\t%xmm1, %xmm0" 1 { xfail { { !
> nonpic } && ia32 } } } } */
> -/* { dg-final { scan-assembler-times "movapd\t%xmm0, %xmm1" 1 { xfail { { !
> nonpic } && ia32 } } } } */
> +
> +/* { dg-final { scan-assembler-times {addpd\t\.?[Ll]C0.*, %xmm0} 1 { target
> { { ! ia32 } || nonpic } } } } */
> +/* { dg-final { scan-assembler-times {movapd\t\.?[Ll]C0.*, %xmm1} 1 { target
> { ia32 && { ! nonpic } } } } } */
> +
> +/* We happen to get this for both cases, but in different positions. */
> +/* { dg-final { scan-assembler-times "addpd\t%xmm1, %xmm0" 1 } } */
> +
> +/* { dg-final { scan-assembler-times "movapd\t%xmm0, %xmm1" 1 { target { { !
> ia32 } || nonpic } } } } */
> +/* { dg-final { scan-assembler-times "movapd\t%xmm0, %xmm2" 1 { target {
> ia32 && { ! nonpic } } } } } */
> +/* { dg-final { scan-assembler-times "addpd\t%xmm2, %xmm0" 1 { target { ia32
> && { ! nonpic } } } } } */
>
> /* Check absence of save/restore of xmm1 register. */
> /* { dg-final { scan-assembler-not "movaps\t%xmm1, \\(%\[re\]?sp\\)" } } */
> diff --git a/gcc/testsuite/gcc.target/i386/fuse-caller-save.c
> b/gcc/testsuite/gcc.target/i386/fuse-caller-save.c
> index 4b8e68d..c0e8bf4 100644
> --- a/gcc/testsuite/gcc.target/i386/fuse-caller-save.c
> +++ b/gcc/testsuite/gcc.target/i386/fuse-caller-save.c
> @@ -16,11 +16,9 @@ foo (int y)
> return y + bar (y);
> }
>
> -/* For !nonpic && ia32 xfails, see PR64895. */
> -
> /* Check that no registers are saved/restored. */
> -/* { dg-final { scan-assembler-not "push" { xfail { { ! nonpic } && ia32 } }
> } } */
> -/* { dg-final { scan-assembler-not "pop" { xfail { { ! nonpic } && ia32 } }
> } } */
> +/* { dg-final { scan-assembler-not "push" } } */
> +/* { dg-final { scan-assembler-not "pop" } } */
>
> /* PR61605. If the first argument register and the return register differ,
> then
> bar leaves the first argument register intact. That means in foo that the
> @@ -31,4 +29,4 @@ foo (int y)
> /* { dg-final { scan-assembler-not "movl" { target { ! ia32 } } } } */
>
> /* Check that addition uses di (in case of no copy) or dx (in case of copy).
> */
> -/* { dg-final { scan-assembler-times "addl\t%\[re\]?d\[ix\], %\[re\]?ax" 1 {
> xfail { { ! nonpic } && ia32 } } } } */
> +/* { dg-final { scan-assembler-times "addl\t%\[re\]?d\[ix\], %\[re\]?ax" 1 }
> } */
>
