Hi,
"uxtw x0, w1" is an alias for "mov w0, w1" but currently the
back-end marks it as extend type rather than mov_reg. This patch
fixes that. For most schedule models, this does not matter; I am
adding one where mov (both 32bit and 64bit register mov) can be
considered as zero latency in some cases so being able to find them is
important.
OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions.
Thanks,
Andrew Pinski
ChangeLog:
* config/aarch64/aarch64.md (zero_extendsidi2_aarch64): Fix type
attrribute for uxtw.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index ff83974aeb0..70f04186127 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1621,7 +1621,7 @@
ldr\t%s0, %1
fmov\t%w0, %s1
fmov\t%s0, %s1"
- [(set_attr "type" "extend,load_4,f_mcr,f_loads,f_mrc,fmov")
+ [(set_attr "type" "mov_reg,load_4,f_mcr,f_loads,f_mrc,fmov")
(set_attr "arch" "*,*,fp,fp,fp,fp")]
)
