Re: [PATCH] Improve arm and aarch64 casesi (PR target/70341)

[James Greenhalgh]

On Fri, Feb 22, 2019 at 06:20:51PM -0600, Jakub Jelinek wrote:
> Hi!
> 
> The testcase in the PR doesn't hoist any memory loads from the large switch
> before the switch on aarch64 and arm (unlike e.g. x86), because the
> arm/aarch64 casesi patterns don't properly annotate the memory load from the
> jump table.  It is created by gen_* and in RTL directly one can't specify
> the needed flags (MEM_READONLY_P and MEM_NOTRAP_P).
> 
> Fixed thusly, bootstrapped/regtested on armv7hl-linux-gnueabi and
> aarch64-linux, ok for trunk?
> 
> 2019-02-23  Jakub Jelinek  <ja...@redhat.com>
> 
>       PR target/70341
>       * config/aarch64/aarch64.md (casesi): Create the casesi_dispatch
>       MEM manually here, set MEM_READONLY_P and MEM_NOTRAP_P on it.

This AArch64 part is OK for trunk.

Thanks,
James

> --- gcc/config/aarch64/aarch64.md.jj  2019-01-19 09:39:18.847831222 +0100
> +++ gcc/config/aarch64/aarch64.md     2019-02-21 15:25:27.874532191 +0100
> @@ -622,13 +622,27 @@ (define_expand "casesi"
>                                   operands[0], operands[2], operands[4]));
>  
>      operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, 
> operands[3]));
> -    emit_jump_insn (gen_casesi_dispatch (operands[2], operands[0],
> -                                      operands[3]));
> +    operands[2]
> +      = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[2], operands[0]),
> +                     UNSPEC_CASESI);
> +    operands[2] = gen_rtx_MEM (DImode, operands[2]);
> +    MEM_READONLY_P (operands[2]) = 1;
> +    MEM_NOTRAP_P (operands[2]) = 1;
> +    emit_jump_insn (gen_casesi_dispatch (operands[2], operands[3]));
>      DONE;
>    }
>  )
>  
> -(define_insn "casesi_dispatch"
> +(define_expand "casesi_dispatch"
> +  [(parallel
> +    [(set (pc) (match_operand:DI 0 ""))
> +     (clobber (reg:CC CC_REGNUM))
> +     (clobber (match_scratch:DI 2))
> +     (clobber (match_scratch:DI 3))
> +     (use (label_ref:DI (match_operand 1 "")))])]
> +  "")
> +
> +(define_insn "*casesi_dispatch"
>    [(parallel
>      [(set (pc)
>         (mem:DI (unspec [(match_operand:DI 0 "register_operand" "r")
> @@ -637,7 +651,7 @@ (define_insn "casesi_dispatch"
>       (clobber (reg:CC CC_REGNUM))
>       (clobber (match_scratch:DI 3 "=r"))
>       (clobber (match_scratch:DI 4 "=r"))
> -     (use (label_ref (match_operand 2 "" "")))])]
> +     (use (label_ref:DI (match_operand 2 "" "")))])]
>    ""
>    "*
>    return aarch64_output_casesi (operands);
> 
>       Jakub