On Tue, Nov 8, 2011 at 5:01 PM, Michael Meissner
<meiss...@linux.vnet.ibm.com> wrote:
> On Mon, Nov 07, 2011 at 09:22:11PM -1100, Jakub Jelinek wrote:
>> Hi!
>>
>> Working virtually out of Pago Pago for now.
>>
>> The following patch enables mixed mode COND_EXPR vectorization, similarly
>> how it has been enabled for i?86/x86_64 a few months ago.
>> For Altivec/VSX the only combinations that can be supported are
>> V4SImode comparison (unsigned or signed) with V4SFmode then/else and
>> destination and V4SFmode comparison with V4SImode then/else and destination.
>> As Altivec/VSX uses mask vectors for comparisons, the change is trivial.
>>
>> With this we can vectorize gcc.dg/vect/{vect-cond-{8,9,10},slp-cond-2}.c
>> with either -O3 -maltivec or -O3 -mvsx.
>>
>> Bootstrap/regtest pending, ok for trunk if it passes?
>>
>> 2011-11-08 Jakub Jelinek <ja...@redhat.com>
>>
>> * config/rs6000/vector.md (vcondv4sfv4si, vcondv4siv4sf,
>> vconduv4sfv4si): New patterns.
>> * config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Handle
>> different dest_mode from comparison mode.
>>
>> * lib/target-supports.exp (check_effective_target_vect_cond_mixed):
>> Enable also for powerpc*-*-*.
>
> Looks good to me, but David gets the final call on checking it in.
Okay with me.
Thanks, David
