In 64-bit mode when MMX is disabled, SSE2 can be used to emulate MMX
instructions.
PR target/89021
* config/i386/i386.h (TARGET_MMX_INSNS): New.
(TARGET_MMX_INSNS_P): Likewise.
(TARGET_MMX_WITH_SSE): Likewise.
(TARGET_MMX_WITH_SSE_P): Likewise.
---
gcc/config/i386/i386.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 83b025e0cf5..b62305fceec 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -43,6 +43,16 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If
not, see
#define TARGET_64BIT_P(x) TARGET_ISA_64BIT_P(x)
#define TARGET_MMX TARGET_ISA_MMX
#define TARGET_MMX_P(x) TARGET_ISA_MMX_P(x)
+/* In 64-bit mode, SSE2 can be used to emulate MMX instructions. */
+#define TARGET_MMX_INSNS \
+ (TARGET_MMX || (TARGET_64BIT && TARGET_SSE2))
+#define TARGET_MMX_INSNS_P(x) \
+ (TARGET_MMX_P(x) || (TARGET_64BIT_P (x) && TARGET_SSE2_P (x)))
+/* In 64-bit mode, use special SSE2 patterns for MMX emulation. */
+#define TARGET_MMX_WITH_SSE \
+ (TARGET_64BIT && TARGET_SSE2 && !TARGET_MMX)
+#define TARGET_MMX_WITH_SSE_P(x) \
+ (TARGET_64BIT_P (x) && TARGET_SSE2_P (x) && !TARGET_MMX_P(x))
#define TARGET_3DNOW TARGET_ISA_3DNOW
#define TARGET_3DNOW_P(x) TARGET_ISA_3DNOW_P(x)
#define TARGET_3DNOW_A TARGET_ISA_3DNOW_A
--
2.20.1
