On Wed, Dec 19, 2018 at 01:49:41PM +0000, Segher Boessenkool wrote:
> This pattern optimises a scalar extract from a vector loaded from
> memory to be just a scalar load from memory. But to do a 64-bit
> integer load you need 64-bit integer registers, which needs
> TARGET_POWERPC64.
>
> This fixes it. Tested on powerpc64-linux {-m32,-m64}; committing to trunk.
I've also backported it to 8 and 7.
Segher
> 2018-12-19 Segher Boessenkool <seg...@kernel.crashing.org>
>
> PR target/88213
> * config/rs6000/vsx.md (*vsx_extract_<P:mode>_<VSX_D:mode>_load):
> Require TARGET_POWERPC64.
>
> ---
> gcc/config/rs6000/vsx.md | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
> index e30f89d..2c00b40 100644
> --- a/gcc/config/rs6000/vsx.md
> +++ b/gcc/config/rs6000/vsx.md
> @@ -3257,7 +3257,7 @@ (define_insn_and_split
> "*vsx_extract_<P:mode>_<VSX_D:mode>_load"
> (match_operand:VSX_D 1 "memory_operand" "m,m")
> (parallel [(match_operand:QI 2 "const_0_to_1_operand" "n,n")])))
> (clobber (match_scratch:P 3 "=&b,&b"))]
> - "VECTOR_MEM_VSX_P (<VSX_D:MODE>mode)"
> + "TARGET_POWERPC64 && VECTOR_MEM_VSX_P (<VSX_D:MODE>mode)"
> "#"
> "&& reload_completed"
> [(set (match_dup 0) (match_dup 4))]
> --
> 1.8.3.1
