On Fri, Nov 02, 2018 at 01:37:41PM -0500, Sudakshina Das wrote: > Hi > > This patch is part of a series that enables ARMv8.5-A in GCC and > adds Branch Target Identification Mechanism. > (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) > > This patch add all the command line feature that are added by ARMv8.5. > Optional extensions to armv8.5-a: > +rng : Random number Generation Instructions. > +memtag : Memory Tagging Extension. > > ARMv8.5-A features that are optional to older arch: > +sb : Speculation barrier instruction. > +ssbs: Speculative Store Bypass Safe instruction. > +predres: Execution and Data Prediction Restriction instructions. > > All of the above only effect the assembler and have already (or almost > for a couple of cases) gone in the trunk of binutils. > > Bootstrapped and regression tested with aarch64-none-linux-gnu. > > Is this ok for trunk?
OK, but will need rebased to keep the AARCH64_FL_* in order. Thanks, James > *** gcc/ChangeLog *** > > 2018-xx-xx Sudakshina Das <sudi....@arm.com> > > * config/aarch64/aarch64-option-extensions.def: Define > AARCH64_OPT_EXTENSION for memtag, rng, sb, ssbs and predres. > * gcc/config/aarch64/aarch64.h (AARCH64_FL_RNG): New. > (AARCH64_FL_MEMTAG, ARCH64_FL_SB, AARCH64_FL_SSBS): New. > (AARCH64_FL_PREDRES): New. > (AARCH64_FL_FOR_ARCH8_5): Add AARCH64_FL_SB, AARCH64_FL_SSBS and > AARCH64_FL_PREDRES by default. > * gcc/doc/invoke.texi: Document rng, memtag, sb, ssbs and > predres. >
