On Tue, Oct 02, 2018 at 11:19:06AM -0500, Richard Henderson wrote: > Do not zero-extend the input to the cas for subword operations; > instead, use the appropriate zero-extending compare insns. > Correct the predicates and constraints for immediate expected operand.
OK, modulo two very dull style comments. > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c > index fbec54fe5da..0e2b85de1e3 100644 > --- a/gcc/config/aarch64/aarch64.c > +++ b/gcc/config/aarch64/aarch64.c > @@ -1613,6 +1613,33 @@ aarch64_gen_compare_reg (RTX_CODE code, rtx x, rtx y) > return cc_reg; > } > > +/* Similarly, but maybe zero-extend Y if Y_MODE < SImode. */ > + > +static rtx > +aarch64_gen_compare_reg_maybe_ze(RTX_CODE code, rtx x, rtx y, > + machine_mode y_mode) Space before the bracket: aarch64_gen_compare_reg_maybe_ze (RTX_CODE > @@ -14187,26 +14197,32 @@ aarch64_expand_compare_and_swap (rtx operands[]) > /* The CAS insn requires oldval and rval overlap, but we need to > have a copy of oldval saved across the operation to tell if > the operation is successful. */ > - if (mode == QImode || mode == HImode) > - rval = copy_to_mode_reg (SImode, gen_lowpart (SImode, oldval)); > - else if (reg_overlap_mentioned_p (rval, oldval)) > - rval = copy_to_mode_reg (mode, oldval); > - else > - emit_move_insn (rval, oldval); > + if (reg_overlap_mentioned_p (rval, oldval)) > + rval = copy_to_mode_reg (r_mode, oldval); > + else Trailing space on else. > + emit_move_insn (rval, gen_lowpart (r_mode, oldval)); > + > emit_insn (gen_aarch64_compare_and_swap_lse (mode, rval, mem, > newval, mod_s)); > - aarch64_gen_compare_reg (EQ, rval, oldval); > + cc_reg = aarch64_gen_compare_reg_maybe_ze (NE, rval, oldval, mode); > } Thanks, James
