Hello, Proper synchronization of instruction and data caches for trampolines is always tricky.
As we we considering various options to achieve this on ARM
for VxWorks, Alex found out about the cacheTextUpdate entry
point.
The function is expected to always be available
and to perform whatever needs to be done, if anything at all,
from the kernel perspective so tailored for whatever particular
board/cpu at hand.
This turned out a perfect fit, available since at least
version 5.4.
This patch arranges to provide an implementation of
__clear_cache using this service consistently for all the
VxWorks ports.
The bulk of this was contributed by Alex (thanks!)
I only added the LIB2FUNCS_EXCLUDE part and performed
the on-board verification that the patch had the intended effect
(before the patch, crashes from heavy use of indirect calls to
nested functions, then correct execution after the patch).
We have been using this for a while in our gcc-7 based toolchains
on several targets.
I checked on a gcc-8 based source tree that I can still
build functional compilers passing Ada ACATS for VxWorks
6.9 and 7.0.
Also bootstrapped and reg tested on mainline for x86_64-linux.
With Kind Regards,
Olivier
2018-09-20 Alexandre Oliva <ol...@adacore.com>
libgcc/
* config/vxcache.c: New file. Provide __clear_cache, based on
the cacheTextUpdate VxWorks service.
* config/t-vxworks (LIB2ADD): Add vxcache.c.
(LIB2FUNCS_EXCLUDE): Add _clear_cache.
* config/t-vxwoks7: Likewise.
gcc/
* config/vxworks.h (CLEAR_INSN_CACHE): #define to 1.
0007-Resort-to-VxWorks-cacheLib-services-for-__clear_cach.patch
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