On Mon, Jun 4, 2018 at 8:32 AM Eric Botcazou <ebotca...@adacore.com> wrote:
>
> Hi,
>
> the previous patch makes it possible to merge bit-field stores whose RHS is a
> constant or a SSA name, but there is a hitch: if the SSA name is the result of
> an "interesting" load, then the optimization is blocked. That's because the
> GIMPLE store-merging pass not only attempts to merge stores but also loads if
> they directly feed subsequent stores. Therefore the code generated for:
>
> struct S {
> unsigned int flag : 1;
> unsigned int size : 31;
> };
>
> void foo (struct S *s, struct S *m)
> {
> s->flag = 1;
> s->size = m->size;
> }
>
> is still abysmal at -O2:
>
> orb $1, (%rdi)
> movl (%rsi), %eax
> andl $-2, %eax
> movl %eax, %edx
> movl (%rdi), %eax
> andl $1, %eax
> orl %edx, %eax
> movl %eax, (%rdi)
> ret
>
> The attached patch changes it into the optimal:
>
> movl (%rsi), %eax
> orl $1, %eax
> movl %eax, (%rdi)
> ret
>
> The patch doesn't modify the overall logic of the pass but just turns MEM_REF
> stores into BIT_INSERT_EXPR stores when there is a preceding or subsequent
> BIT_INSERT_EXPR or INTEGER_CST store in the same bit-field region.
>
> Tested on x86-64/Linux, OK for the mainline?
OK.
Richard.
>
> 2018-06-04 Eric Botcazou <ebotca...@adacore.com>
>
> * gimple-ssa-store-merging.c (struct merged_store_group): Move up
> bit_insertion field and declare can_be_merged_into method.
> (merged_store_group::can_be_merged_into): New method.
> (imm_store_chain_info::coalesce_immediate): Call it to decide whether
> consecutive non-overlapping stores can be merged. Turn MEM_REF stores
> into BIT_INSERT_EXPR stores if the group contains a non-MEM_REF store.
>
>
> 2018-06-04 Eric Botcazou <ebotca...@adacore.com>
>
> * gcc.dg/store_merging_21.c: New test.
> * gnat.dg/opt71b.adb: Likewise.
>
> --
> Eric Botcazou
