On Wed, May 09, 2018 at 05:54:53PM -0500, Segher Boessenkool wrote:
> Hi Mike,
>
> On Thu, May 03, 2018 at 01:17:03PM -0400, Michael Meissner wrote:
> > 2018-05-03 Michael Meissner <meiss...@linux.vnet.ibm.com>
> >
> > * config/rs6000/rs6000.c (mode_supports_dq_form): Rename
> > mode_supports_vsx_dform_quad to mode_supports_dq_form.
> > (mode_supports_vsx_dform_quad): Likewise.
> > (quad_address_p): Likewise.
> > (reg_offset_addressing_ok_p): Likewise.
> > (offsettable_ok_by_alignment): Likewise.
> > (rs6000_legitimate_offset_address_p): Likewise.
> > (legitimate_lo_sum_address_p): Likewise.
> > (rs6000_legitimize_address): Likewise.
> > (rs6000_legitimize_reload_address): Likewise.
> > (rs6000_secondary_reload_inner): Likewise.
> > (rs6000_preferred_reload_class): Likewise.
> > (rs6000_output_move_128bit): Likewise.
>
> * config/rs6000/rs6000.c (mode_supports_vsx_dform_quad): Rename to ...
> (mode_supports_dq_form): ... this. Update all callers.
>
>
> > --- gcc/config/rs6000/rs6000.c (revision 259864)
> > +++ gcc/config/rs6000/rs6000.c (working copy)
> > @@ -649,7 +649,7 @@ mode_supports_vmx_dform (machine_mode mo
> > is more limited than normal d-form addressing in that the offset must be
> > aligned on a 16-byte boundary. */
> > static inline bool
> > -mode_supports_vsx_dform_quad (machine_mode mode)
> > +mode_supports_dq_form (machine_mode mode)
> > {
> > return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] &
> > RELOAD_REG_QUAD_OFFSET)
> > != 0);
>
> Will this eventually handle all DQ-form, not just vector? Is it supposed
> to?
Other than LQ (and LTPTR which GCC doesn't generate), all dq-form instructions
load/store VSX registers. The problem is GCC will not generate LQ on little
endian systems because the registers are loaded in a big endian fashion.
It was more given we now have mode_supports_d_form and mode_supports_ds_form, I
was just making the name similar.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.ibm.com, phone: +1 (978) 899-4797
