Hi,
I found wrong ymm registers are generated in case of 
"-march=skylake-avx512 -mprefer-vector-width=128" options set

The code looks like:
        movq    %r11, 64(%rbx) 
        vpxord  %ymm0, %ymm0, %ymm0 
        vmovdqa64       %xmm0, 32(%rbx)
        movq    %r11, 15584(%rbx)

where MODE_TI used in standard_sse_constant_opcode();

This patch fix that to "xmm" registers generation because we don't have to touch
upper part of registers in case of 128bit type.

2017-11-24  Sergey Shalnov  <sergey.shal...@intel.com>
gcc/
        * config/i386/i386.c (standard_sse_constant_opcode): Fix
        registers type for 128bit mode.

Attachment: 0007-Fix-registers-type-for-MODE_TI.patch
Description: 0007-Fix-registers-type-for-MODE_TI.patch

Reply via email to