Segher:
I still have issues with the <wd>.
> > +(define_mode_attr VSX_XXBR [(V16QI "q")
> > + (V8HI "h")
> > + (V4SI "w")
> > + (V4SF "w")
> > + (V2DF "d")
> > + (V2DI "d")
> > + (V1TI "q")])
>
> So I think this is wrong for V16QI. You can use <wd> fine, but you need
> to avoid generating "xxbrb" insns; instead, do a register move? xxbrq
> isn't the insn you want, as far as I see.
>
> > +;; Swap all bytes in each element of vector
> > +(define_expand "revb_<mode>"
> > + [(set (match_operand:VEC_A 0 "vsx_register_operand")
> > + (bswap:VEC_A (match_operand:VEC_A 1 "vsx_register_operand")))]
> > + "TARGET_P9_VECTOR"
> > +{
> > + rtx sel;
>
> So a special case here:
>
> if (<MODE>mode == V16QImode)
> {
> emit_move_insn (operands[0], operands[1]);
> DONE;
> }
Even if I put in the above special case, I still have issues with the
<wd>. The updated code for the expand with the special case above is
(define_expand "revb_<mode>"
[(set (match_operand:VEC_A 0 "vsx_register_operand")
(bswap:VEC_A (match_operand:VEC_A 1 "vsx_register_operand")))]
"TARGET_P8_VECTOR"
{
rtx sel;
if (TARGET_P9_VECTOR)
if (<MODE>mode == V16QImode)
emit_move_insn (operands[0], operands[1]);
else
emit_insn (gen_p9_xxbr<wd>_<mode> (operands[0], operands[1]));
etc.
The issue is the if (<MODE>mode == V16QImode) does not prevent the code
in the else statement from getting expanded for <wd>. I agree it will
prevent the generation of the instruction but the code is still expanded
and compiled. I get the error message:
/home/carll/GCC/gcc-revb/gcc/config/rs6000/vsx.md:4727:62: error:
‘gen_p9_xxbrb_v16qi’ was not declared in this scope
emit_insn (gen_p9_xxbr<wd>_<mode> (operands[0], operands[1]));
Because <wd> for mode v16qi still gets expanded to "b" not "q".
There is no definition for "gen_p9_xxbrb_v16qi" since xxbrb is not
vaild. Short of using a different expander for <wd> I don't see how to
not get the expansion. Sorry if I am missing something obvious here.
Carl Love
