GCC maintainers:
The following patch add Power8 vec_revb() builtin support to the
existing Power 9 support. The Power ISA specification says the
vec_revb() builtin is to be supported on both Power 8 and Power 9.
There are new instructions in Power 9 that support the vec_revb()
functionality. So the support generates different code for Power 8
versus Power 9.
The patch has been tested on
powerpc64le-unknown-linux-gnu (Power 8 LE)
powerpc64-unknown-linux-gnu (Power 8 BE)
powerpc64le-unknown-linux-gnu (Power 9 LE)
without regressions.
Please let me know if the following patch is acceptable. Thanks.
Carl Love
-------------------------------------------------------------------------------------------
>From 5813b99e68f1a5e82bcc1cb1ee0636f6386ba841 Mon Sep 17 00:00:00 2001
From: Carl Love <c...@us.ibm.com>
Date: Mon, 2 Oct 2017 11:04:01 -0500
Subject: [PATCH] Add Power 8 support to vec_revb
gcc/ChangeLog:
2017-10-05 Carl Love <c...@us.ibm.com>
* config/rs6000/rs6000-c.c (P8V_BUILTIN_VEC_REVB):
Add power 8 definitions for the builtin instances.
(P9V_BUILTIN_VEC_REVB): Remove the power 9 instance
definitions.
* config/rs6000/altivec.h (vec_revb): Change the
#define from power 9 to power 8.
* config/rs6000/rs6000-builtin.def (BU_P8V_VSX_1,
BU_P8V_OVERLOAD_1): Add power 8 macro expansions.
(BU_P9V_OVERLOAD_1): Remove power 9 overload expansion.
* config/rs6000/vsx.md (revb_<mode>): Add define_expand
to generate power 8 instructions for the vec_revb builtin.
gcc/testsuite/ChangeLog:
2017-10-05 Carl Love <c...@us.ibm.com>
*gcc.target/powerpc/builtins-revb-runnable.c: New
runnable test file for the vec_revb builtin.
---
gcc/config/rs6000/altivec.h | 3 +-
gcc/config/rs6000/rs6000-builtin.def | 10 +-
gcc/config/rs6000/rs6000-c.c | 44 +--
gcc/config/rs6000/vsx.md | 88 +++++
.../gcc.target/powerpc/builtins-revb-runnable.c | 354 +++++++++++++++++++++
5 files changed, 474 insertions(+), 25 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/powerpc/builtins-revb-runnable.c
diff --git a/gcc/config/rs6000/altivec.h b/gcc/config/rs6000/altivec.h
index c8e508c..a05e23a 100644
--- a/gcc/config/rs6000/altivec.h
+++ b/gcc/config/rs6000/altivec.h
@@ -415,6 +415,7 @@
#define vec_vsubuqm __builtin_vec_vsubuqm
#define vec_vupkhsw __builtin_vec_vupkhsw
#define vec_vupklsw __builtin_vec_vupklsw
+#define vec_revb __builtin_vec_revb
#endif
#ifdef __POWER9_VECTOR__
@@ -476,8 +477,6 @@
#define vec_xlx __builtin_vec_vextulx
#define vec_xrx __builtin_vec_vexturx
-
-#define vec_revb __builtin_vec_revb
#endif
/* Predicates.
diff --git a/gcc/config/rs6000/rs6000-builtin.def
b/gcc/config/rs6000/rs6000-builtin.def
index 850164a..7ca2974 100644
--- a/gcc/config/rs6000/rs6000-builtin.def
+++ b/gcc/config/rs6000/rs6000-builtin.def
@@ -1853,6 +1853,13 @@ BU_P6_64BIT_2 (CMPB, "cmpb", CONST, cmpbdi3)
/* 1 argument VSX instructions added in ISA 2.07. */
BU_P8V_VSX_1 (XSCVSPDPN, "xscvspdpn", CONST, vsx_xscvspdpn)
BU_P8V_VSX_1 (XSCVDPSPN, "xscvdpspn", CONST, vsx_xscvdpspn)
+BU_P8V_VSX_1 (REVB_V1TI, "revb_v1ti", CONST, revb_v1ti)
+BU_P8V_VSX_1 (REVB_V2DI, "revb_v2di", CONST, revb_v2di)
+BU_P8V_VSX_1 (REVB_V4SI, "revb_v4si", CONST, revb_v4si)
+BU_P8V_VSX_1 (REVB_V8HI, "revb_v8hi", CONST, revb_v8hi)
+BU_P8V_VSX_1 (REVB_V16QI, "revb_v16qi", CONST, revb_v16qi)
+BU_P8V_VSX_1 (REVB_V2DF, "revb_v2df", CONST, revb_v2df)
+BU_P8V_VSX_1 (REVB_V4SF, "revb_v4sf", CONST, revb_v4sf)
/* 1 argument altivec instructions added in ISA 2.07. */
BU_P8V_AV_1 (ABS_V2DI, "abs_v2di", CONST, absv2di2)
@@ -1962,6 +1969,7 @@ BU_P8V_OVERLOAD_1 (VPOPCNTUH, "vpopcntuh")
BU_P8V_OVERLOAD_1 (VPOPCNTUW, "vpopcntuw")
BU_P8V_OVERLOAD_1 (VPOPCNTUD, "vpopcntud")
BU_P8V_OVERLOAD_1 (VGBBD, "vgbbd")
+BU_P8V_OVERLOAD_1 (REVB, "revb")
/* ISA 2.07 vector overloaded 2 argument functions. */
BU_P8V_OVERLOAD_2 (EQV, "eqv")
@@ -2073,8 +2081,6 @@ BU_P9V_OVERLOAD_1 (VSTDCNQP, "scalar_test_neg_qp")
BU_P9V_OVERLOAD_1 (VSTDCNDP, "scalar_test_neg_dp")
BU_P9V_OVERLOAD_1 (VSTDCNSP, "scalar_test_neg_sp")
-BU_P9V_OVERLOAD_1 (REVB, "revb")
-
BU_P9V_OVERLOAD_1 (VEXTRACT_FP_FROM_SHORTH, "vextract_fp_from_shorth")
BU_P9V_OVERLOAD_1 (VEXTRACT_FP_FROM_SHORTL, "vextract_fp_from_shortl")
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index 897306c..0706319 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -5532,36 +5532,38 @@ const struct altivec_builtin_types
altivec_overloaded_builtins[] = {
RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI,
RS6000_BTI_unsigned_V16QI, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
- RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
- RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
- RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V1TI,
- RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V1TI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI,
RS6000_BTI_V1TI, RS6000_BTI_V1TI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRD_V2DI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V1TI,
+ RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI,
+ RS6000_BTI_bool_V2DI, RS6000_BTI_bool_V2DI, 0, 0 },
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI,
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRD_V2DI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DI,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRD_V2DF,
- RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI,
RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI,
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SI,
RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SF,
- RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI,
RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI,
RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
- { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V8HI,
RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI,
+ RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 },
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI,
+ RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V16QI,
+ RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V2DF,
+ RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
+ { P8V_BUILTIN_VEC_REVB, P8V_BUILTIN_REVB_V4SF,
+ RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
{ ALTIVEC_BUILTIN_VEC_VREVE, ALTIVEC_BUILTIN_VREVE_V2DI,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, 0, 0 },
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index b47eeac..fccde97 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -4712,6 +4712,94 @@
"xxbrw %x0,%x1"
[(set_attr "type" "vecperm")])
+;; Swap all bytes in each 32-bit element
+(define_expand "revb_<mode>"
+ [(set (match_operand:VSX_L 0 "vsx_register_operand" "=wa")
+ (bswap:VSX_L (match_operand:VSX_L 1 "vsx_register_operand" "wa")))]
+ "TARGET_P9_VECTOR || TARGET_VSX"
+{
+ int vals[16];
+ rtx mask = gen_reg_rtx (V16QImode);
+ int i;
+ rtvec v;
+ rtx rvals[16];
+
+ if (TARGET_P9_VECTOR)
+ {
+ if (<MODE>mode == V1TImode)
+ emit_insn (gen_p9_xxbrq_v1ti (operands[0], operands[1]));
+ else if (<MODE>mode == V2DImode)
+ emit_insn (gen_p9_xxbrd_v2di (operands[0], operands[1]));
+ else if (<MODE>mode == V2DFmode)
+ emit_insn (gen_p9_xxbrd_v2df (operands[0], operands[1]));
+ else if (<MODE>mode == V4SImode)
+ emit_insn (gen_p9_xxbrw_v4si (operands[0], operands[1]));
+ else if (<MODE>mode == V4SFmode)
+ emit_insn (gen_p9_xxbrw_v4sf (operands[0], operands[1]));
+ else if (<MODE>mode == V8HImode)
+ emit_insn (gen_p9_xxbrh_v8hi (operands[0], operands[1]));
+ else if (<MODE>mode == V16QImode)
+ emit_insn (gen_p9_xxbrq_v16qi (operands[0], operands[1]));
+ }
+ else
+ {
+ if (<MODE>mode == V1TImode)
+ {
+ vals[0] = 15; vals[1] = 14; vals[2] = 13; vals[3] = 12;
+ vals[4] = 11; vals[5] = 10; vals[6] = 9; vals[7] = 8;
+ vals[8] = 7; vals[9] = 6; vals[10] = 5; vals[11] = 4;
+ vals[12] = 3; vals[13] = 2; vals[14] = 1; vals[15] = 0;
+ }
+ else if ((<MODE>mode == V2DImode) || (<MODE>mode == V2DFmode))
+ {
+ vals[0] = 7; vals[1] = 6; vals[2] = 5; vals[3] = 4;
+ vals[4] = 3; vals[5] = 2; vals[6] = 1; vals[7] = 0;
+ vals[8] = 15; vals[9] = 14; vals[10] = 13; vals[11] = 12;
+ vals[12] = 11; vals[13] = 10; vals[14] = 9; vals[15] = 8;
+ }
+ else if ((<MODE>mode == V4SImode) || (<MODE>mode == V4SFmode))
+ {
+ vals[0] = 3; vals[1] = 2; vals[2] = 1; vals[3] = 0;
+ vals[4] = 7; vals[5] = 6; vals[6] = 5; vals[7] = 4;
+ vals[8] = 11; vals[9] = 10; vals[10] = 9; vals[11] = 8;
+ vals[12] = 15; vals[13] = 14; vals[14] = 13; vals[15] = 12;
+ }
+ else if (<MODE>mode == V8HImode)
+ {
+ vals[0] = 1; vals[1] = 0; vals[2] = 3; vals[3] = 2;
+ vals[4] = 5; vals[5] = 4; vals[6] = 7; vals[7] = 6;
+ vals[8] = 9; vals[9] = 8; vals[10] = 11; vals[11] = 10;
+ vals[12] = 13; vals[13] = 12; vals[14] = 15; vals[15] = 14;
+ }
+ else if (<MODE>mode == V16QImode)
+ {
+ vals[0] = 15; vals[1] = 14; vals[2] = 13; vals[3] = 12;
+ vals[4] = 11; vals[5] = 10; vals[6] = 9; vals[7] = 8;
+ vals[8] = 7; vals[9] = 6; vals[10] = 5; vals[11] = 4;
+ vals[12] = 3; vals[13] = 2; vals[14] = 1; vals[15] = 0;
+ }
+ else
+ {
+ vals[0] = 0; vals[1] = 0; vals[2] = 0; vals[3] = 0;
+ vals[4] = 0; vals[5] = 0; vals[6] = 0; vals[7] = 0;
+ vals[8] = 0; vals[9] = 0; vals[10] = 0; vals[11] = 0;
+ vals[12] = 0; vals[13] = 0; vals[14] = 0; vals[15] = 0;
+ }
+ for (i = 0; i < 16; i++)
+ rvals[i] = GEN_INT (vals[i]);
+
+ v = gen_rtvec_v (16, rvals);
+
+ emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V8HImode, v)));
+ emit_insn (gen_altivec_vperm_<mode> (operands[0], operands[1],
+ operands[1], mask));
+ }
+ DONE;
+}
+
+;; [(set_attr "type" "vecperm")])
+)
+
;; Swap all bytes in each 16-bit element
(define_insn "p9_xxbrh_v8hi"
[(set (match_operand:V8HI 0 "vsx_register_operand" "=wa")
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-revb-runnable.c
b/gcc/testsuite/gcc.target/powerpc/builtins-revb-runnable.c
new file mode 100644
index 0000000..03333ce
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-revb-runnable.c
@@ -0,0 +1,354 @@
+/* { dg-do run { target { powerpc*-*-* } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
"-mcpu=power8" } } */
+/* { dg-require-effective-target vsx_hw } */
+/* { dg-options "-mcpu=power8 -O3" } */
+
+#include <altivec.h>
+
+#define DEBUG 1
+
+#ifdef DEBUG
+#include <stdio.h>
+#endif
+
+void abort (void);
+
+/* Verify vec_revb builtins */
+
+int
+main()
+{
+ int i;
+ vector bool char arg_bc, result_bc, expected_bc;
+ vector unsigned char arg_uc, result_uc, expected_uc;
+ vector signed char arg_sc, result_sc, expected_sc;
+
+ vector bool short int arg_bsi, result_bsi, expected_bsi;
+ vector unsigned short int arg_usi, result_usi, expected_usi;
+ vector short int arg_si, result_si, expected_si;
+
+ vector bool int arg_bi, result_bi, expected_bi;
+ vector unsigned int arg_ui, result_ui, expected_ui;
+ vector int arg_int, result_int, expected_int;
+
+ vector bool long long int arg_blli, result_blli, expected_blli;
+ vector unsigned long long int arg_ulli, result_ulli, expected_ulli;
+ vector long long int arg_lli, result_lli, expected_lli;
+
+ vector __uint128_t arg_uint128, result_uint128, expected_uint128;
+ vector __int128_t arg_int128, result_int128, expected_int128;
+
+ vector float arg_f, result_f, expected_f;
+ vector double arg_d, result_d, expected_d;
+
+ /* 8-bit ints */
+ arg_bc = (vector bool char) {0x01, 0x23, 0x45, 0x67,
+ 0x7E, 0x7C, 0x7A, 0x78,
+ 0x02, 0x46, 0x7A, 0x7E,
+ 0x13, 0x57, 0x7B, 0x7F};
+ expected_bc = (vector bool char) {0x7F, 0x7b, 0x57, 0x13,
+ 0x7E, 0x7A, 0x46, 0x02,
+ 0x78, 0x7A, 0x7C, 0x7E,
+ 0x67, 0x45, 0x23, 0x01};
+
+ result_bc = vec_revb (arg_bc);
+
+ for (i = 0; i < 16; i++) {
+ if (result_bc[i] != expected_bc[i])
+#ifdef DEBUG
+ printf("arg_bc[%d] = 0x%x, result_bc[%d] = 0x%x, expected_bc[%d] =
0x%x\n",
+ i, arg_bc[i], i, result_bc[i], i, expected_bc[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_uc = (vector unsigned char) {0x01, 0x23, 0x45, 0x67,
+ 0x7E, 0x7C, 0x7A, 0x78,
+ 0x02, 0x46, 0x7A, 0x7E,
+ 0x13, 0x57, 0x7B, 0x7F};
+ expected_uc = (vector unsigned char) {0x7F, 0x7b, 0x57, 0x13,
+ 0x7E, 0x7A, 0x46, 0x02,
+ 0x78, 0x7A, 0x7C, 0x7E,
+ 0x67, 0x45, 0x23, 0x01};
+
+ result_uc = vec_revb (arg_uc);
+
+ for (i = 0; i < 16; i++) {
+ if (result_uc[i] != expected_uc[i])
+#ifdef DEBUG
+ printf("arg_uc[%d] = 0x%x, result_uc[%d] = 0x%x, expected_uc[%d] =
0x%x\n",
+ i, arg_uc[i], i, result_uc[i], i, expected_uc[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_sc = (vector signed char) {0x01, 0x23, 0x45, 0x67,
+ 0x7E, 0x7C, 0x7A, 0x78,
+ 0x02, 0x46, 0x7A, 0x7E,
+ 0x13, 0x57, 0x7B, 0x7F};
+ expected_sc = (vector signed char) {0x7F, 0x7b, 0x57, 0x13,
+ 0x7E, 0x7A, 0x46, 0x02,
+ 0x78, 0x7A, 0x7C, 0x7E,
+ 0x67, 0x45, 0x23, 0x01};
+
+ result_sc = vec_revb (arg_sc);
+
+ for (i = 0; i < 16; i++) {
+ if (result_sc[i] != expected_sc[i])
+#ifdef DEBUG
+ printf("arg_sc[%d] = 0x%x, result_sc[%d] = 0x%x, expected_sc[%d] =
0x%x\n",
+ i, arg_sc[i], i, result_sc[i], i, expected_sc[i]);
+#else
+ abort();
+#endif
+ }
+
+ /* 16-bit ints */
+ arg_bsi = (vector bool short int) {0x0123, 0x4567, 0xFEDC, 0xBA98, 0x0246,
+ 0x8ACE, 0x1357, 0x9BDF};
+ expected_bsi = (vector bool short int) {0x2301, 0x6745, 0xDCFE, 0x98BA,
+ 0x4602, 0xCE8A, 0x5713, 0xDF9B};
+
+ result_bsi = vec_revb (arg_bsi);
+
+ for (i = 0; i < 8; i++) {
+ if (result_bsi[i] != expected_bsi[i])
+#ifdef DEBUG
+ printf("arg_bsi[%d] = 0x%x, result_bsi[%d] = 0x%x, expected_bsi[%d] =
0x%x\n",
+ i, arg_bsi[i], i, result_bsi[i], i, expected_bsi[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_usi = (vector unsigned short int) {0x0123, 0x4567, 0xFEDC, 0xBA98,
+ 0x0246, 0x8ACE, 0x1357, 0x9BDF};
+ expected_usi = (vector unsigned short int) {0x2301, 0x6745, 0xDCFE, 0x98BA,
+ 0x4602, 0xCE8A, 0x5713, 0xDF9B};
+
+ result_usi = vec_revb (arg_usi);
+
+ for (i = 0; i < 8; i++) {
+ if (result_usi[i] != expected_usi[i])
+#ifdef DEBUG
+ printf("arg_usi[%d] = 0x%x, result_usi[%d] = 0x%x, expected_usi[%d] =
0x%x\n",
+ i, arg_usi[i], i, result_usi[i], i, expected_usi[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_si = (vector short int) {0x0123, 0x4567, 0xFEDC, 0xBA98, 0x0246, 0x8ACE,
+ 0x1357, 0x9BDF};
+ expected_si = (vector short int) {0x2301, 0x6745, 0xDCFE, 0x98BA, 0x4602,
+ 0xCE8A, 0x5713, 0xDF9B};
+
+ result_si = vec_revb (arg_si);
+
+ for (i = 0; i < 8; i++) {
+ if (result_si[i] != expected_si[i])
+#ifdef DEBUG
+ printf("arg_si[%d] = 0x%x, result_si[%d] = 0x%x, expected_si[%d] =
0x%x\n",
+ i, arg_si[i], i, result_si[i], i, expected_si[i]);
+#else
+ abort();
+#endif
+ }
+
+ /* 32-bit ints */
+ arg_bi = (vector bool int) {0x01234567, 0xFEDCBA98, 0x02468ACE, 0x13579BDF};
+ expected_bi = (vector bool int) {0x67452301, 0x98BADCFE, 0xCE8A4602,
+ 0xDF9B5713};
+
+ result_bi = vec_revb (arg_bi);
+
+ for (i = 0; i < 4; i++) {
+ if (result_bi[i] != expected_bi[i])
+#ifdef DEBUG
+ printf("arg_bi[%d] = 0x%x, result_bi[%d] = 0x%x, expected_bi[%d] =
0x%x\n",
+ i, arg_bi[i], i, result_bi[i], i, expected_bi[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_ui = (vector unsigned int) {0x01234567, 0xFEDCBA98, 0x02468ACE,
+ 0x13579BDF};
+ expected_ui = (vector unsigned int) {0x67452301, 0x98BADCFE, 0xCE8A4602,
+ 0xDF9B5713};
+
+ result_ui = vec_revb (arg_ui);
+
+ for (i = 0; i < 4; i++) {
+ if (result_ui[i] != expected_ui[i])
+#ifdef DEBUG
+ printf("arg_ui[%d] = 0x%x, result_ui[%d] = 0x%x, expected_ui[%d] =
0x%x\n",
+ i, arg_ui[i], i, result_ui[i], i, expected_ui[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_int = (vector int) {0x01234567, 0xFEDCBA98, 0x02468ACE, 0x13579BDF};
+ expected_int = (vector int) {0x67452301, 0x98BADCFE, 0xCE8A4602, 0xDF9B5713};
+
+ result_int = vec_revb (arg_int);
+
+ for (i = 0; i < 4; i++) {
+ if (result_int[i] != expected_int[i])
+#ifdef DEBUG
+ printf("arg_int[%d] = 0x%x, result_int[%d] = 0x%x, expected_int[%d] =
0x%x\n",
+ i, arg_int[i], i, result_int[i], i, expected_int[i]);
+#else
+ abort();
+#endif
+ }
+
+ /* 64-bit ints */
+ arg_blli = (vector bool long long int) {0x01234567FEDCBA98,
+ 0x02468ACE13579BDF};
+ expected_blli = (vector bool long long int) {0x98BADCFE67452301,
+ 0xDF9B5713CE8A4602};
+
+ result_blli = vec_revb (arg_blli);
+
+ for (i = 0; i < 2; i++) {
+ if (result_blli[i] != expected_blli[i])
+#ifdef DEBUG
+ printf("arg_blli[%d] = 0x%x, result_blli[%d] = 0x%llx, expected_blli[%d]
= 0x%llx\n",
+ i, arg_blli[i], i, result_blli[i], i, expected_blli[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_ulli = (vector unsigned long long int) {0x01234567FEDCBA98,
+ 0x02468ACE13579BDF};
+ expected_ulli = (vector unsigned long long int) {0x98BADCFE67452301,
+ 0xDF9B5713CE8A4602};
+
+ result_ulli = vec_revb (arg_ulli);
+
+ for (i = 0; i < 2; i++) {
+ if (result_ulli[i] != expected_ulli[i])
+#ifdef DEBUG
+ printf("arg_ulli[%d] = 0x%x, result_ulli[%d] = 0x%llx, expected_ulli[%d]
= 0x%llx\n",
+ i, arg_ulli[i], i, result_ulli[i], i, expected_ulli[i]);
+#else
+ abort();
+#endif
+ }
+
+ arg_lli = (vector long long int) {0x01234567FEDCBA98, 0x02468ACE13579BDF};
+ expected_lli = (vector long long int) {0x98BADCFE67452301,
+ 0xDF9B5713CE8A4602};
+
+ result_lli = vec_revb (arg_lli);
+
+ for (i = 0; i < 2; i++) {
+ if (result_lli[i] != expected_lli[i])
+#ifdef DEBUG
+ printf("arg_lli[%d] = 0x%x, result_lli[%d] = 0x%llx, expected_lli[%d] =
0x%llx\n",
+ i, arg_lli[i], i, result_lli[i], i, expected_lli[i]);
+#else
+ abort();
+#endif
+ }
+
+ /* 128-bit ints */
+ arg_uint128[0] = 0x1627384950617243;
+ arg_uint128[0] = arg_uint128[0] << 64;
+ arg_uint128[0] |= 0x9405182930415263;
+ expected_uint128[0] = 0x6352413029180594;
+ expected_uint128[0] = expected_uint128[0] << 64;
+ expected_uint128[0] |= 0x4372615049382716;
+
+ result_uint128 = vec_revb (arg_uint128);
+
+ if (result_uint128[0] != expected_uint128[0])
+ {
+#ifdef DEBUG
+ printf("result_uint128[0] doesn't match expected_u128[0]\n");
+ printf("arg_uint128[0] = %llx ", arg_uint128[0] >> 64);
+ printf(" %llx\n", arg_uint128[0] & 0xFFFFFFFFFFFFFFFF);
+
+ printf("result_uint128[0] = %llx ", result_uint128[0] >> 64);
+ printf(" %llx\n", result_uint128[0] & 0xFFFFFFFFFFFFFFFF);
+
+ printf("expected_uint128[0] = %llx ", expected_uint128[0] >> 64);
+ printf(" %llx\n", expected_uint128[0] & 0xFFFFFFFFFFFFFFFF);
+#else
+ abort();
+#endif
+ }
+
+ arg_int128[0] = 0x1627384950617283;
+ arg_int128[0] = arg_int128[0] << 64;
+ arg_int128[0] |= 0x9405182930415263;
+ expected_int128[0] = 0x6352413029180594;
+ expected_int128[0] = expected_int128[0] << 64;
+ expected_int128[0] |= 0x8372615049382716;;
+
+ result_int128 = vec_revb (arg_int128);
+
+ if (result_int128[0] != expected_int128[0])
+ {
+#ifdef DEBUG
+ printf("result_int128[0] doesn't match expected128[0]\n");
+ printf("arg_int128[0] = %llx ", arg_int128[0] >> 64);
+ printf(" %llx\n", arg_int128[0] & 0xFFFFFFFFFFFFFFFF);
+
+ printf("result_int128[0] = %llx ", result_int128[0] >> 64);
+ printf(" %llx\n", result_int128[0] & 0xFFFFFFFFFFFFFFFF);
+
+ printf("expected_int128[0] = %llx ", expected_int128[0] >> 64);
+ printf(" %llx\n", expected_int128[0] & 0xFFFFFFFFFFFFFFFF);
+#else
+ abort();
+#endif
+ }
+
+ /* 32-bit floats */
+ /* 0x42f7224e, 0x43e471ec, 0x49712062, 0x4a0f2b38 */
+ arg_f = (vector float) {123.567, 456.89, 987654.123456, 2345678.0};
+ /* 0x4e22F742, 0xec71e443, 0x62207149, 0x382b0f4a */
+ expected_f = (vector float) {683528320.0,
+ -1169716232068291395011477504.0,
+ 739910526898278498304.0,
+ 0.0000407838160754181444644927978515625};
+
+ result_f = vec_revb (arg_f);
+
+ for (i = 0; i < 4; i++) {
+ if (result_f[i] != expected_f[i])
+ {
+#ifdef DEBUG
+ printf(" arg_f[%d] = 0x%x, result_f[%d] = 0x%x, expected_f[%d] =
0x%x\n",
+ i, arg_f[i], i, result_f[i], i, expected_f[i]);
+#else
+ abort();
+#endif
+ }
+ }
+
+ /* 64-bit floats */
+ /* 0x419D6F34547E6B75 0x4194E5FEC781948B */
+ arg_d = (vector double) {123456789.123456789, 87654321.87654321};
+ /* 0x756B7E54346F9D41 0x8B9481C7FEE59441 */
+ expected_d = (vector double) {4.12815412905659550518671402044E257,
+ -6.99269992046390236552018719554E-253};
+
+ result_d = vec_revb (arg_d);
+
+ for (i = 0; i < 2; i++) {
+ if (result_d[i] != expected_d[i])
+#ifdef DEBUG
+ printf("arg_d[%d] = 0x%llx, result_d[%d] = 0x%llx, expected_d[%d] =
%f\n",
+ i, arg_d[i], i, result_d[i], i, expected_d[i]);
+#else
+ abort();
+#endif
+ }
+}
--
2.7.4
