Hi Carl,
Just some nits:
On Mon, Sep 11, 2017 at 09:18:12AM -0700, Carl Love wrote:
> +(define_expand "vec_widen_smult_odd_v4si"
> + [(use (match_operand:V2DI 0 "register_operand" ""))
> + (use (match_operand:V4SI 1 "register_operand" ""))
> + (use (match_operand:V4SI 2 "register_operand" ""))]
The "" here are superfluous.
> + "TARGET_P8_VECTOR"
> +{
> + if (VECTOR_ELT_ORDER_BIG)
> + emit_insn (gen_altivec_vmulosw (operands[0], operands[1],
+ operands[2]));
> + else
> + emit_insn (gen_altivec_vmulesw (operands[0], operands[1],
> + operands[2]));
> + DONE;
> +})
These lines fit without wrapping.
Looks fine otherwise, please commit!
Segher
