This patch introduces a new value for the insn type attribute bmask.
bmask instructions, which were previously typed as `array', are
adapted to use it, and finally the several DFA schedulers are updated
accordingly.
gcc/ChangeLog:
* config/sparc/sparc.md: New instruction type `bmask'.
(bmaskdi_vis): Use the `bmask' type.
(bmasksi_vis): Likewise.
* config/sparc/ultra3.md (us3_array): Likewise.
* config/sparc/niagara7.md (n7_array): Likewise.
* config/sparc/niagara4.md (n4_array): Likewise.
* config/sparc/niagara2.md (niag2_vis): Likewise.
(niag3_vis): Likewise.
* config/sparc/niagara.md (niag_vis): Likewise.
---
gcc/ChangeLog | 12 ++++++++++++
gcc/config/sparc/niagara.md | 2 +-
gcc/config/sparc/niagara2.md | 4 ++--
gcc/config/sparc/niagara4.md | 2 +-
gcc/config/sparc/niagara7.md | 4 ++--
gcc/config/sparc/sparc.md | 6 +++---
gcc/config/sparc/ultra3.md | 2 +-
7 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/gcc/config/sparc/niagara.md b/gcc/config/sparc/niagara.md
index f79771f..f9a1f6d 100644
--- a/gcc/config/sparc/niagara.md
+++ b/gcc/config/sparc/niagara.md
@@ -114,5 +114,5 @@
*/
(define_insn_reservation "niag_vis" 8
(and (eq_attr "cpu" "niagara")
- (eq_attr "type"
"fga,visl,vismv,fgm_pack,fgm_mul,pdist,edge,edgen,gsr,array"))
+ (eq_attr "type"
"fga,visl,vismv,fgm_pack,fgm_mul,pdist,edge,edgen,gsr,array,bmask"))
"niag_pipe*8")
diff --git a/gcc/config/sparc/niagara2.md b/gcc/config/sparc/niagara2.md
index 9bcdd06..34ee630 100644
--- a/gcc/config/sparc/niagara2.md
+++ b/gcc/config/sparc/niagara2.md
@@ -111,10 +111,10 @@
(define_insn_reservation "niag2_vis" 6
(and (eq_attr "cpu" "niagara2")
- (eq_attr "type"
"fga,vismv,visl,fgm_pack,fgm_mul,pdist,edge,edgen,array,gsr"))
+ (eq_attr "type"
"fga,vismv,visl,fgm_pack,fgm_mul,pdist,edge,edgen,array,bmask,gsr"))
"niag2_pipe*6")
(define_insn_reservation "niag3_vis" 9
(and (eq_attr "cpu" "niagara3")
- (eq_attr "type"
"fga,vismv,visl,fgm_pack,fgm_mul,pdist,pdistn,edge,edgen,array,gsr"))
+ (eq_attr "type"
"fga,vismv,visl,fgm_pack,fgm_mul,pdist,pdistn,edge,edgen,array,bmask,gsr"))
"niag2_pipe*9")
diff --git a/gcc/config/sparc/niagara4.md b/gcc/config/sparc/niagara4.md
index ad0a04b..cc1bb75 100644
--- a/gcc/config/sparc/niagara4.md
+++ b/gcc/config/sparc/niagara4.md
@@ -66,7 +66,7 @@
(define_insn_reservation "n4_array" 12
(and (eq_attr "cpu" "niagara4")
- (eq_attr "type" "array,edge,edgen"))
+ (eq_attr "type" "array,bmask,edge,edgen"))
"n4_slot1, nothing*11")
(define_insn_reservation "n4_vis_move_1cycle" 1
diff --git a/gcc/config/sparc/niagara7.md b/gcc/config/sparc/niagara7.md
index 12d6ab0..3dc8f9e 100644
--- a/gcc/config/sparc/niagara7.md
+++ b/gcc/config/sparc/niagara7.md
@@ -71,7 +71,7 @@
(define_insn_reservation "n7_array" 12
(and (eq_attr "cpu" "niagara7")
- (eq_attr "type" "array,edge,edgen"))
+ (eq_attr "type" "array,bmask,edge,edgen"))
"n7_slot1, nothing*11")
(define_insn_reservation "n7_fpdivs" 24
@@ -133,4 +133,4 @@
(eq_attr "v3pipe" "false")))
"n7_slot1, nothing*10")
-(define_bypass 3 "*_v3pipe" "*_v3pipe")
+(define_bypass 3 "n7*_v3pipe" "n7_*_v3pipe")
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 5c5096b..da23060 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -281,7 +281,7 @@
fpcmp,
fpmul,fpdivs,fpdivd,
fpsqrts,fpsqrtd,
- fga,visl,vismv,fgm_pack,fgm_mul,pdist,pdistn,edge,edgen,gsr,array,
+ fga,visl,vismv,fgm_pack,fgm_mul,pdist,pdistn,edge,edgen,gsr,array,bmask,
cmove,
ialuX,
multi,savew,flushw,iflush,trap,lzd"
@@ -9134,7 +9134,7 @@
(plus:DI (match_dup 1) (match_dup 2)))]
"TARGET_VIS2 && TARGET_ARCH64"
"bmask\t%r1, %r2, %0"
- [(set_attr "type" "array")
+ [(set_attr "type" "bmask")
(set_attr "v3pipe" "true")])
(define_insn "bmasksi_vis"
@@ -9145,7 +9145,7 @@
(zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
"TARGET_VIS2"
"bmask\t%r1, %r2, %0"
- [(set_attr "type" "array")
+ [(set_attr "type" "bmask")
(set_attr "v3pipe" "true")])
(define_insn "bshuffle<VM64:mode>_vis"
diff --git a/gcc/config/sparc/ultra3.md b/gcc/config/sparc/ultra3.md
index 6296b38..f5b81d6 100644
--- a/gcc/config/sparc/ultra3.md
+++ b/gcc/config/sparc/ultra3.md
@@ -56,7 +56,7 @@
(define_insn_reservation "us3_array" 2
(and (eq_attr "cpu" "ultrasparc3")
- (eq_attr "type" "array,edgen"))
+ (eq_attr "type" "array,edgen,bmask"))
"us3_ms + us3_slotany, nothing")
;; ??? Not entirely accurate.
--
2.3.4
