Thank you for your review, I'll include your points into the a new revised patch. //Claudiu
> -----Original Message----- > From: Sandra Loosemore [mailto:san...@codesourcery.com] > Sent: Tuesday, April 25, 2017 5:43 PM > To: Claudiu Zissulescu <claudiu.zissule...@synopsys.com>; gcc- > patc...@gcc.gnu.org > Cc: francois.bed...@synopsys.com; andrew.burg...@embecosm.com > Subject: Re: [PATCH 2/3] [ARC] Fast interrupts support. > > On 04/25/2017 07:03 AM, Claudiu Zissulescu wrote: > > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > > index cebafe6..aa5cd27 100644 > > --- a/gcc/doc/invoke.texi > > +++ b/gcc/doc/invoke.texi > > @@ -606,7 +606,8 @@ Objective-C and Objective-C++ Dialects}. > > -mnorm -mspfp -mspfp-compact -mspfp-fast -msimd -msoft-float - > mswap @gol > > -mcrc -mdsp-packa -mdvbf -mlock -mmac-d16 -mmac-24 -mrtsc - > mswape @gol > > -mtelephony -mxy -misize -mannotate-align -marclinux -marclinux_prof > @gol > > --mlong-calls -mmedium-calls -msdata -mirq-ctrl-saved @gol > > +-mlong-calls -mmedium-calls -msdata -mirq-ctrl-saved > > +-mrgf-banked-regs @gol > > Please don't remove @gol at the end of the line. It's easier to > maintain these option lists in the docs if the line breaks in the source > reflect where they're being inserted in the output. > > > -mvolatile-cache -mtp-regno=@var{regno} @gol > > -malign-call -mauto-modify-reg -mbbit-peephole -mno-brcc @gol > > -mcase-vector-pcrel -mcompact-casesi -mno-cond-exec -mearly- > cbranchsi @gol > > @@ -14587,6 +14588,18 @@ A register range always starts with r0. > Registers blink and lp_count > > can be specified individually. Only valid for ARC EM and ARC HS > > cores. > > > > +@item -mrgf-banked-regs="NUMBER" > > Please use @var markup here. Don't use quotes unless they're a literal > part of the syntax. > > > +@opindex mrgf-banked-regs > > +Specifies the number of registers replicated in second register bank > > +on entry to fast interrupt. Fast interrupts are interrupts with the > > +highest priority level P0. These interrupts save only PC and STATUS32 > > +registers to avoid memory transactions during interrupt entry and exit > > +sequences. Use this option when you are using fast interrupts in an > > +ARC V2 family processor. > > + > > +Permitted values are 4, 8, 16, 32 and specify the number of registers > > +that are covered by the second register bank. > > + > > @end table > > > > The following options are passed through to the assembler, and also > > -Sandra >
