On Tue, Sep 27, 2011 at 9:47 AM, Revital Eres <revital.e...@linaro.org> wrote:
> Hello,
>
>> ok, so if we have an auto-inc'ing insn which defines (auto-inc's) an
>> addr register and another (say, result) register, we want to allow the
>> result register to have life ranges in excess of ii (by eliminating
>> anti-dep edges of distance 1 from uses to def, and generating
>> reg_moves if/where needed), but avoid having such life ranges of addr
>> (by retaining such anti-dep edges). Right?
>
> Yes.
>>
>> Are these all the edges? We have only one True dependence edge from
>> insn 1 to insn 2, but insn 1 is setting two registers both used by
>> insn 2 (regardless of what we decide to do with Anti-deps). As for
>> Anti-deps of distance 1, we have only one going back from insn 2 to
>> insn 1, perhaps corresponding to addr, allowing reg_moves for def1(?).
>> But, it won't help def1, because this other Anti-dep will force them
>> to be scheduled w/o reg_moves.
>
> Please ignore the edges in the previous example. It indeed was a mistake,
> sorry about the confusion. Here are two examples taken from bootstrap
> on PPC of how the address is used; with the current patch applied and
> running with -fmodulo-sched-allow-regmoves:
>
Ok, this does have two anti-dep edges. But still, only a single true
dependence(?) ... can you see why?
Thanks,
Ayal.
> Node num: 2
> (insn 3681 3678 3682 500 (set (reg:QI 2914 [ MEM[base: D.9586_4130,
> offset: 0B] ])
> (mem:QI (pre_dec:DI (reg:DI 1644 [ ivtmp.687 ])) [0 MEM[base:
> D.9586_4130, offset: 0B]+0 S1 A8])) ../../gcc/libiberty/regex.c:4259
> 358 {*movqi_internal}
> (expr_list:REG_INC (reg:DI 1644 [ ivtmp.687 ])
> (nil)))
> OUT ARCS: [3681 -(T,2,1)-> 3681] [3681 -(T,2,0)-> 3682]
> IN ARCS: [3682 -(A,0,1)-> 3681] [3681 -(T,2,1)-> 3681] [3682
> -(A,0,1)-> 3681] [3682 -(T,2,1)-> 3681]
> Node num: 3
> (insn 3682 3681 3683 500 (set (mem:QI (plus:DI (reg:DI 1644 [ ivtmp.687 ])
> (const_int 3 [0x3])) [0 MEM[base: D.9586_4130, offset:
> 3B]+0 S1 A8])
> (reg:QI 2914 [ MEM[base: D.9586_4130, offset: 0B] ]))
> ../../gcc/libiberty/regex.c:4259 358 {*movqi_internal}
> (expr_list:REG_DEAD (reg:QI 2914 [ MEM[base: D.9586_4130, offset: 0B] ])
> (nil)))
> OUT ARCS: [3682 -(A,0,1)-> 3681] [3682 -(A,0,1)-> 3681] [3682
> -(O,0,0)-> 7263] [3682 -(A,0,0)-> 3683] [3682 -(T,2,1)-> 3681]
> IN ARCS: [3681 -(T,2,0)-> 3682]
>
> Another example of usage is as follows (the address register is not
> used in MEM):
>
> Node num: 0
> (insn 1419 1415 1423 9 (set (mem/f:DI (pre_inc:DI (reg:DI 1882 [
> ivtmp.1636 ])) [3 MEM[base: D.10911_2945, offset: 0B]+0 S8 A64])
> (reg/f:DI 3923)) ../../gcc/libiberty/regex.c:5788 378
> {*movdi_internal64}
> (expr_list:REG_INC (reg:DI 1882 [ ivtmp.1636 ])
> (nil)))
> OUT ARCS: [1419 -(T,2,1)-> 1419] [1419 -(O,0,0)-> 5932] [1419
> -(O,0,0)-> 1449] [1419 -(T,2,1)-> 1434] [1419 -(T,2,0)-> 1434]
> [1419 -(T,2,0)-> 1432] [1419 -(O,0,0)-> 1431] [1419 -(O,0,0)-> 1427]
> [1419 -(O,0,0)-> 1423]
> IN ARCS: [1419 -(T,2,1)-> 1419] [1432 -(A,0,1)-> 1419] [1449
> -(O,0,1)-> 1419] [1434 -(A,0,1)-> 1419] [1431 -(O,0,1)-> 1419]
> [1427 -(O,0,1)-> 1419] [1423 -(O,0,1)-> 1419]
> Node num: 4
> (insn 1432 1431 1433 9 (set (reg:DI 2632)
> (plus:DI (reg/v/f:DI 1058 [ reg_info ])
> (reg:DI 1882 [ ivtmp.1636 ])))
> ../../gcc/libiberty/regex.c:5543 79 {*adddi3_internal1}
> (nil))
> OUT ARCS: [1432 -(A,0,1)-> 1419] [1432 -(T,1,0)-> 1433]
> IN ARCS: [1419 -(T,2,0)-> 1432]
>
>>> OK for mainline?
>>>
>>
>> OK, with the following comments:
>
> Thanks, will address the comments and re-submit.
>
>> In other words, one would expect to see two Anti-dep edges from insn 2
>> to insn 1, right?
>
> Yes, that's indeed the case in the first example above.
>
> Thanks,
> Revital
>
