[PATCH, GCC/ARM, Stage 1] Rename FPSCR builtins to correct names

[Prakhar Bahuguna]

The GCC documentation in section 6.60.8 ARM Floating Point Status and Control
Intrinsics states that the FPSCR register can be read and written to using the
intrinsics __builtin_arm_get_fpscr and __builtin_arm_set_fpscr. However, these
are misnamed within GCC itself and these intrinsic names are not recognised.
This patch corrects the intrinsic names to match the documentation, and adds
tests to verify these intrinsics generate the correct instructions.

Testing done: Ran regression tests on arm-none-eabi for Cortex-M4.

2017-03-09  Prakhar Bahuguna  <prakhar.bahug...@arm.com>

gcc/ChangeLog:

        * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename
          __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename
          __builtin_arm_stfscr to __builtin_arm_set_fpscr.
        * gcc/testsuite/gcc.target/arm/fpscr.c: New file.

Okay for stage 1?

--

Prakhar Bahuguna

>From 8359732084b5b5585d14b7fbdf70d3cfa4c6dda2 Mon Sep 17 00:00:00 2001
From: Prakhar Bahuguna <prakhar.bahug...@arm.com>
Date: Wed, 8 Mar 2017 16:29:09 +0000
Subject: [PATCH] Rename FPSCR builtins to correct names

---
 gcc/config/arm/arm-builtins.c        |  4 ++--
 gcc/testsuite/gcc.target/arm/fpscr.c | 16 ++++++++++++++++
 2 files changed, 18 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arm/fpscr.c

diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index ca622519b7d..aef05d0127f 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -1860,10 +1860,10 @@ arm_init_builtins (void)
        = build_function_type_list (unsigned_type_node, NULL);
 
       arm_builtin_decls[ARM_BUILTIN_GET_FPSCR]
-       = add_builtin_function ("__builtin_arm_ldfscr", ftype_get_fpscr,
+       = add_builtin_function ("__builtin_arm_get_fpscr", ftype_get_fpscr,
                                ARM_BUILTIN_GET_FPSCR, BUILT_IN_MD, NULL, 
NULL_TREE);
       arm_builtin_decls[ARM_BUILTIN_SET_FPSCR]
-       = add_builtin_function ("__builtin_arm_stfscr", ftype_set_fpscr,
+       = add_builtin_function ("__builtin_arm_set_fpscr", ftype_set_fpscr,
                                ARM_BUILTIN_SET_FPSCR, BUILT_IN_MD, NULL, 
NULL_TREE);
     }
 
diff --git a/gcc/testsuite/gcc.target/arm/fpscr.c 
b/gcc/testsuite/gcc.target/arm/fpscr.c
new file mode 100644
index 00000000000..7b4d71d72d8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/fpscr.c
@@ -0,0 +1,16 @@
+/* Test the fpscr builtins.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_fp_ok } */
+/* { dg-skip-if "need fp instructions" { *-*-* } { "-mfloat-abi=soft" } { "" } 
} */
+/* { dg-add-options arm_fp } */
+
+void
+test_fpscr ()
+{
+  volatile unsigned int status = __builtin_arm_get_fpscr ();
+  __builtin_arm_set_fpscr (status);
+}
+
+/* { dg-final { scan-assembler "mrc\tp10, 7, r\[0-9\]+, cr1, cr0, 0" } } */
+/* { dg-final { scan-assembler "mcr\tp10, 7, r\[0-9\]+, cr1, cr0, 0" } } */
-- 
2.11.0