Hi,
I think the patch isn't quite complete yet. You will also need changes in
generic code. Currently sched_macro_fuse_insns() does:
if (any_condjump_p (insn))
{
unsigned int condreg1, condreg2;
rtx cc_reg_1;
targetm.fixed_condition_code_regs (&condreg1, &condreg2);
cc_reg_1 = gen_rtx_REG (CCmode, condreg1);
prev = prev_nonnote_nondebug_insn (insn);
if (!reg_referenced_p (cc_reg_1, PATTERN (insn))
|| !prev
|| !modified_in_p (cc_reg_1, prev))
return;
}
Ie. it explicitly looks for a flag-setting ALU instruction whose condition is
used by a conditional branch, so none of the cases in your patch can match.
Note this code also excludes all CBZ type branches as fusion candidates,
is that intended too?
Wilco