On Mon, Mar 6, 2017 at 9:59 PM, Jakub Jelinek <ja...@redhat.com> wrote:
> Hi!
>
> vp{min,max}{s,u}q instructions are available already on avx512f (for
> 128-bit/256-bit EVEX encoded with avx512vl), the expander has been
> incorrectly requiring avx512bw for V8DImode.
> The first hunk is just fpr consistency, the insns don't require avx512bw
> anywhere, so naming it that way is misleading.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
> 2017-03-06  Jakub Jelinek  <ja...@redhat.com>
>
>         PR rtl-optimization/79901
>         * config/i386/sse.md (*avx512bw_<code><mode>3<mask_name>): Renamed to
>         ...
>         (*avx512f_<code><mode>3<mask_name>): ... this.
>         (<code><mode>3 with maxmin code iterator): Use VI8_AVX2_AVX512F
>         iterator instead of VI8_AVX2_AVX512BW.
>
>         * gcc.target/i386/pr79901.c: New test.

OK.

Thanks,
Uros.

> --- gcc/config/i386/sse.md.jj   2017-03-06 12:35:27.000000000 +0100
> +++ gcc/config/i386/sse.md      2017-03-06 15:32:54.484585101 +0100
> @@ -10841,7 +10841,7 @@ (define_expand "<code><mode>3_mask"
>    "TARGET_AVX512F"
>    "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
>
> -(define_insn "*avx512bw_<code><mode>3<mask_name>"
> +(define_insn "*avx512f_<code><mode>3<mask_name>"
>    [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
>         (maxmin:VI48_AVX512VL
>           (match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v")
> @@ -10865,10 +10865,10 @@ (define_insn "<mask_codefor><code><mode>
>     (set_attr "mode" "<sseinsnmode>")])
>
>  (define_expand "<code><mode>3"
> -  [(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand")
> -       (maxmin:VI8_AVX2_AVX512BW
> -         (match_operand:VI8_AVX2_AVX512BW 1 "register_operand")
> -         (match_operand:VI8_AVX2_AVX512BW 2 "register_operand")))]
> +  [(set (match_operand:VI8_AVX2_AVX512F 0 "register_operand")
> +       (maxmin:VI8_AVX2_AVX512F
> +         (match_operand:VI8_AVX2_AVX512F 1 "register_operand")
> +         (match_operand:VI8_AVX2_AVX512F 2 "register_operand")))]
>    "TARGET_SSE4_2"
>  {
>    if (TARGET_AVX512F
> --- gcc/testsuite/gcc.target/i386/pr79901.c.jj  2017-03-06 15:34:19.969487037 
> +0100
> +++ gcc/testsuite/gcc.target/i386/pr79901.c     2017-03-06 15:34:02.000000000 
> +0100
> @@ -0,0 +1,22 @@
> +/* PR rtl-optimization/79901 */
> +/* { dg-do compile } */
> +/* { dg-options "-O3 -mavx512f -fno-ssa-phiopt" } */
> +
> +unsigned int
> +foo (const unsigned long long x)
> +{
> +  if (x < 0)
> +    return 0;
> +  else if ( x > ~0U)
> +    return ~0U;
> +  else
> +    return (unsigned int) x;
> +}
> +
> +void
> +bar (unsigned x, unsigned int *y, unsigned int z)
> +{
> +  unsigned i;
> +  for (i = 0; i < x; i++)
> +    y[i] = foo (y[i] * (unsigned long long) z);
> +}
>
>         Jakub

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