On Wed, Mar 1, 2017 at 10:00 AM, Uros Bizjak <ubiz...@gmail.com> wrote:
> On Wed, Mar 1, 2017 at 9:48 AM, Jakub Jelinek <ja...@redhat.com> wrote:
>> On Wed, Mar 01, 2017 at 09:34:53AM +0100, Uros Bizjak wrote:
>>> Some more thoughts on 64-bit reg on 32-bit targets warning.
>>>
>>> Actually, we never *print* register name for instruction that use "A"
>>> constraint, since %eax/%edx is always implicit The warning does not
>>> deal with constraints, so unless we want to output DImode register
>>> name, there is no warning.
>>
>> Ah, indeed, we don't have a modifier that would print the high register
>> of a register pair (i.e. essentially print REGNO (x) + 1 instead of REGNO
>> (x)), guess that might be useful not just for 64-bit GPR operands in 32-bit
>> code, but also 128-bit GPR operands in 64-bit code.
>
> The issue here is that (modulo ax/dx with "A" constraint) we don't
> guarantee double-register sequence order, so any change in register
> allocation order would break any assumptions. For implicit ax/dx, user
> should explicitly use register name (e.g. DImode operand in "rdtscp;
> mov %0, mem" asm should be corrected to use %%eax instead of %0).
>
> And, yes - we should add similar warning for 128-bit GPRs. The only
> way to use register pair with width > machine_mode is with implicit
> operands or with explicit regnames.
Something like the following patch I'm testing:
--cut here--
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 2b11aa1..943b2a0 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -17646,13 +17646,16 @@ print_reg (rtx x, int code, FILE *file)
switch (msize)
{
+ case 16:
+ case 12:
case 8:
+ if (GENERAL_REGNO_P (regno) && msize > GET_MODE_SIZE (word_mode))
+ warning (0, "unsupported size for integer register");
+ /* FALLTHRU */
case 4:
if (LEGACY_INT_REGNO_P (regno))
putc (msize == 8 && TARGET_64BIT ? 'r' : 'e', file);
/* FALLTHRU */
- case 16:
- case 12:
case 2:
normal:
reg = hi_reg_name[regno];
--cut here--
Uros.
