On Fri, Dec 23, 2016 at 04:47:22PM -0500, Michael Meissner wrote: > I had two thinkos in my previous patches for ISA 3.0 (power9) support that > both > relate to word extraction and insertion. > > The first thinko was that I thought the index for the first byte in the 4 > bytes > to be extracted should be 0..11, when it should be 0..12. If it isn't allowed > to be 12, you cannot extract the 32-bit word at the bottom of the vector > register. > > The second thinko is where I was doing zeo extending of a 32-bit value within > a vector register, I used xxextractuw with a byte offset of 1 instead of 4. > > I have done the usual bootstrap and make check with no regressions on these > patches. Can I install them into the trunk?
Yes please. It sounds like we need a few more testcases though? Segher > 2016-12-23 Michael Meissner <meiss...@linux.vnet.ibm.com> > > * config/rs6000/predicates.md (const_0_to_12_operand): Rename > predicate and change test from 0..11 to 0..12 to match the > semantics of the word extract/insert instructions. Change all > callers. > (const_0_to_11_operand): Likewise. > * config/rs6000/vsx.md (vextract4b): Likewise. > (vextract4b_internal): Likewise. > (vinsert4b): Likewise. > (vinsert4b_internal): Likewise. > (vinsert4b_di): Likewise. > (vinsert4b_di_internal): Likewise. > * config/rs6000/rs6000.md (zero_extendsi<mode>2): Fix offset used > in xxextractuw to zero extend the word in the vector registers. > (lfiwzx): Likewise.
