Hello! > I initially thought that this would only matter for WORD_REGISTER_OPERATIONS > targets like Alpha, where the first set in QImode can implicitly set the whole > DImode register so the use reads well-defined upper bits, but I now wonder > whether this also matters for !WORD_REGISTER_OPERATIONS targets, e.g. x86: > > (set (reg1:DI) ... > ... > (set (reg1:QI) (expression:QI)) > ... > (set (reg2:DI) (any_extend:DI (reg1:QI))) > ... > (use (reg1:DI)) > > where the use reads well-defined upper bits from the very first set.
Please note that there is no guarantee that "(set (reg1:QI) (expression:QI))" will preserve high-order bits. This is guaranteed only when strict_low_part is used on the destination operand. C.f. *addqi_1 pattern, where QImode plus RTX can emit SImode ADDL insn vs. *addqi_1_slp, where QImode ADDQ insn is always emitted. So, the assumption in your last sentece is invalid, as far as x86 is concerned. Uros.
