PING! Once the new options are in, we need also to update the tests.
Andrew, please can you check it,
Claudiu
> -----Original Message-----
> From: Claudiu Zissulescu
> Sent: Monday, May 30, 2016 2:33 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Claudiu Zissulescu <claz...@synopsys.com>; g...@amylaar.uk;
> francois.bed...@synopsys.com
> Subject: [PATCH 2/2] [ARC] Update target specific tests.
>
> Update the ARC specific tests.
>
> OK to apply?
> Claudiu
>
> gcc/
> 2016-05-26 Claudiu Zissulescu <claz...@synopsys.com>
>
> * testsuite/gcc.target/arc/abitest.S: New file.
> * testsuite/gcc.target/arc/va_args-1.c: Likewise.
> * testsuite/gcc.target/arc/va_args-2.c: Likewise.
> * testsuite/gcc.target/arc/va_args-3.c: Likewise.
> * testsuite/gcc.target/arc/mcrc.c: Deleted.
> * testsuite/gcc.target/arc/mdsp-packa.c: Likewise.
> * testsuite/gcc.target/arc/mdvbf.c: Likewise.
> * testsuite/gcc.target/arc/mmac-24.c: Likewise.
> * testsuite/gcc.target/arc/mmac-d16.c: Likewise.
> * testsuite/gcc.target/arc/mno-crc.c: Likewise.
> * testsuite/gcc.target/arc/mno-dsp-packa.c: Likewise.
> * testsuite/gcc.target/arc/mno-dvbf.c: Likewise.
> * testsuite/gcc.target/arc/mno-mac-24.c: Likewise.
> * testsuite/gcc.target/arc/mno-mac-d16.c: Likewise.
> * testsuite/gcc.target/arc/mno-rtsc.c: Likewise.
> * testsuite/gcc.target/arc/mno-xy.c: Likewise.
> * testsuite/gcc.target/arc/mrtsc.c: Likewise.
> * testsuite/gcc.target/arc/arc.exp (check_effective_target_arcem):
> New function.
> (check_effective_target_arc700): Likewise.
> (check_effective_target_arc6xx): Likewise.
> (check_effective_target_arcmpy): Likewise.
> (check_effective_target_archs): Likewise.
> (check_effective_target_clmcpu): Likewise.
> * testsuite/gcc.target/arc/barrel-shifter-1.c: Changed.
> * testsuite/gcc.target/arc/builtin_simd.c: Test only for ARC700
> cpus.
> * testsuite/gcc.target/arc/cmem-1.c: Changed.
> * testsuite/gcc.target/arc/cmem-2.c: Likewise.
> * testsuite/gcc.target/arc/cmem-3.c: Likewise.
> * testsuite/gcc.target/arc/cmem-4.c: Likewise.
> * testsuite/gcc.target/arc/cmem-5.c: Likewise.
> * testsuite/gcc.target/arc/cmem-6.c: Likewise.
> * testsuite/gcc.target/arc/cmem-7.c: Likewise.
> * testsuite/gcc.target/arc/interrupt-1.c: Test for RTIE as well.
> * testsuite/gcc.target/arc/interrupt-2.c: Skip it for ARCv2 cores.
> * testsuite/gcc.target/arc/interrupt-3.c: Match also ARCv2
> warnings.
> * testsuite/gcc.target/arc/jump-around-jump.c: Update options.
> * testsuite/gcc.target/arc/mARC601.c: Changed.
> * testsuite/gcc.target/arc/mcpu-arc600.c: Changed.
> * testsuite/gcc.target/arc/mcpu-arc601.c: Changed.
> * testsuite/gcc.target/arc/mcpu-arc700.c: Changed.
> * testsuite/gcc.target/arc/mdpfp.c: Skip for ARCv2 cores.
> * testsuite/gcc.target/arc/movb-1.c: Changed.
> * testsuite/gcc.target/arc/movb-2.c: Likewise.
> * testsuite/gcc.target/arc/movb-3.c: Likewise.
> * testsuite/gcc.target/arc/movb-4.c: Likewise.
> * testsuite/gcc.target/arc/movb-5.c: Likewise.
> * testsuite/gcc.target/arc/movb_cl-1.c: Likewise.
> * testsuite/gcc.target/arc/movb_cl-2.c: Likewise.
> * testsuite/gcc.target/arc/movbi_cl-1.c: Likewise.
> * testsuite/gcc.target/arc/movh_cl-1.c: Likewise.
> * testsuite/gcc.target/arc/mspfp.c: Skip for ARC HS cores.
> * testsuite/gcc.target/arc/mul64.c: Enable it only for ARC600.
> * testsuite/gcc.target/arc/mulsi3_highpart-1.c: Scan for ARCv2
> instructions.
> * testsuite/gcc.target/arc/mulsi3_highpart-2.c: Skip it for ARCv1
> cores.
> * testsuite/gcc.target/arc/no-dpfp-lrsr.c: Skip it for ARC HS.
> * testsuite/gcc.target/arc/trsub.c: Only for ARC EM cores.
> * testsuite/gcc.target/arc/builtin_simdarc.c: Changed.
> * testsuite/gcc.target/arc/extzv-1.c: Likewise.
> * testsuite/gcc.target/arc/insv-1.c: Likewise.
> * testsuite/gcc.target/arc/insv-2.c: Likewise.
> * testsuite/gcc.target/arc/mA6.c: Likewise.
> * testsuite/gcc.target/arc/mA7.c: Likewise.
> * testsuite/gcc.target/arc/mARC600.c: Likewise.
> * testsuite/gcc.target/arc/mARC700.c: Likewise.
> * testsuite/gcc.target/arc/mcpu-arc600.c: Likewise.
> * testsuite/gcc.target/arc/mcpu-arc700.c: Likewise.
> * testsuite/gcc.target/arc/movl-1.c: Likewise.
> * testsuite/gcc.target/arc/nps400-1.c: Likewise.
> * testsuite/gcc.target/arc/trsub.c: Likewise.
> ---
> gcc/testsuite/gcc.target/arc/abitest.S | 31 +++++++++++
> gcc/testsuite/gcc.target/arc/arc.exp | 66
> +++++++++++++++++++++++-
> gcc/testsuite/gcc.target/arc/barrel-shifter-1.c | 2 +-
> gcc/testsuite/gcc.target/arc/builtin_simd.c | 1 +
> gcc/testsuite/gcc.target/arc/builtin_simdarc.c | 1 +
> gcc/testsuite/gcc.target/arc/cmem-1.c | 1 +
> gcc/testsuite/gcc.target/arc/cmem-2.c | 1 +
> gcc/testsuite/gcc.target/arc/cmem-3.c | 1 +
> gcc/testsuite/gcc.target/arc/cmem-4.c | 1 +
> gcc/testsuite/gcc.target/arc/cmem-5.c | 1 +
> gcc/testsuite/gcc.target/arc/cmem-6.c | 1 +
> gcc/testsuite/gcc.target/arc/cmem-7.c | 1 +
> gcc/testsuite/gcc.target/arc/extzv-1.c | 1 +
> gcc/testsuite/gcc.target/arc/insv-1.c | 1 +
> gcc/testsuite/gcc.target/arc/insv-2.c | 1 +
> gcc/testsuite/gcc.target/arc/interrupt-1.c | 7 ++-
> gcc/testsuite/gcc.target/arc/interrupt-2.c | 1 +
> gcc/testsuite/gcc.target/arc/interrupt-3.c | 2 +-
> gcc/testsuite/gcc.target/arc/jump-around-jump.c | 2 +-
> gcc/testsuite/gcc.target/arc/mA6.c | 1 +
> gcc/testsuite/gcc.target/arc/mA7.c | 1 +
> gcc/testsuite/gcc.target/arc/mARC600.c | 1 +
> gcc/testsuite/gcc.target/arc/mARC601.c | 3 +-
> gcc/testsuite/gcc.target/arc/mARC700.c | 1 +
> gcc/testsuite/gcc.target/arc/mcpu-arc600.c | 3 +-
> gcc/testsuite/gcc.target/arc/mcpu-arc601.c | 5 +-
> gcc/testsuite/gcc.target/arc/mcpu-arc700.c | 3 +-
> gcc/testsuite/gcc.target/arc/mcrc.c | 8 ---
> gcc/testsuite/gcc.target/arc/mdpfp.c | 1 +
> gcc/testsuite/gcc.target/arc/mdsp-packa.c | 9 ----
> gcc/testsuite/gcc.target/arc/mdvbf.c | 9 ----
> gcc/testsuite/gcc.target/arc/mmac-24.c | 8 ---
> gcc/testsuite/gcc.target/arc/mmac-d16.c | 9 ----
> gcc/testsuite/gcc.target/arc/mno-crc.c | 11 ----
> gcc/testsuite/gcc.target/arc/mno-dsp-packa.c | 11 ----
> gcc/testsuite/gcc.target/arc/mno-dvbf.c | 11 ----
> gcc/testsuite/gcc.target/arc/mno-mac-24.c | 11 ----
> gcc/testsuite/gcc.target/arc/mno-mac-d16.c | 11 ----
> gcc/testsuite/gcc.target/arc/mno-rtsc.c | 11 ----
> gcc/testsuite/gcc.target/arc/mno-xy.c | 10 ----
> gcc/testsuite/gcc.target/arc/movb-1.c | 1 +
> gcc/testsuite/gcc.target/arc/movb-2.c | 1 +
> gcc/testsuite/gcc.target/arc/movb-3.c | 1 +
> gcc/testsuite/gcc.target/arc/movb-4.c | 1 +
> gcc/testsuite/gcc.target/arc/movb-5.c | 1 +
> gcc/testsuite/gcc.target/arc/movb_cl-1.c | 1 +
> gcc/testsuite/gcc.target/arc/movb_cl-2.c | 1 +
> gcc/testsuite/gcc.target/arc/movbi_cl-1.c | 1 +
> gcc/testsuite/gcc.target/arc/movh_cl-1.c | 1 +
> gcc/testsuite/gcc.target/arc/movl-1.c | 1 +
> gcc/testsuite/gcc.target/arc/mrtsc.c | 8 ---
> gcc/testsuite/gcc.target/arc/mspfp.c | 1 +
> gcc/testsuite/gcc.target/arc/mul64.c | 3 +-
> gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c | 5 +-
> gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c | 4 +-
> gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c | 1 +
> gcc/testsuite/gcc.target/arc/nps400-1.c | 1 +
> gcc/testsuite/gcc.target/arc/trsub.c | 1 +
> gcc/testsuite/gcc.target/arc/va_args-1.c | 16 ++++++
> gcc/testsuite/gcc.target/arc/va_args-2.c | 14 +++++
> gcc/testsuite/gcc.target/arc/va_args-3.c | 15 ++++++
> 61 files changed, 198 insertions(+), 142 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/arc/abitest.S
> delete mode 100644 gcc/testsuite/gcc.target/arc/mcrc.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mdsp-packa.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mdvbf.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mmac-24.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mmac-d16.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mno-crc.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mno-dvbf.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mno-mac-24.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mno-mac-d16.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mno-rtsc.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mno-xy.c
> delete mode 100644 gcc/testsuite/gcc.target/arc/mrtsc.c
> create mode 100644 gcc/testsuite/gcc.target/arc/va_args-1.c
> create mode 100644 gcc/testsuite/gcc.target/arc/va_args-2.c
> create mode 100644 gcc/testsuite/gcc.target/arc/va_args-3.c
>
> diff --git a/gcc/testsuite/gcc.target/arc/abitest.S
> b/gcc/testsuite/gcc.target/arc/abitest.S
> new file mode 100644
> index 0000000..7be935b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/abitest.S
> @@ -0,0 +1,31 @@
> +/* { dg-do assemble } */
> +#ifndef ENTRY
> +#define ENTRY(nm) \
> + .text ` \
> + .align 4 ` \
> + .globl nm ` \
> + .type nm,@function ` \
> +nm:
> +#endif
> +
> +#ifndef END
> +#define END(name) .size name,.-name
> +#endif
> +
> +ENTRY(tsyscall)
> +ENTRY(clone)
> + add r0,r0,r1
> + add r0,r0,r2
> + add r0,r0,r3
> + add r0,r0,r4
> + add r0,r0,r5
> + j_s.d [blink]
> + add r0,r0,r6
> +END(tsyscall)
> +END(clone)
> +
> +ENTRY(abidi)
> + add.f r0,r1,1
> + j_s.d [blink]
> + adc r1,r2,0
> +END(abidi)
> diff --git a/gcc/testsuite/gcc.target/arc/arc.exp
> b/gcc/testsuite/gcc.target/arc/arc.exp
> index fae2ece7..3b7d100 100644
> --- a/gcc/testsuite/gcc.target/arc/arc.exp
> +++ b/gcc/testsuite/gcc.target/arc/arc.exp
> @@ -4,12 +4,12 @@
> # it under the terms of the GNU General Public License as published by
> # the Free Software Foundation; either version 3 of the License, or
> # (at your option) any later version.
> -#
> +#
> # This program is distributed in the hope that it will be useful,
> # but WITHOUT ANY WARRANTY; without even the implied warranty of
> # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> # GNU General Public License for more details.
> -#
> +#
> # You should have received a copy of the GNU General Public License
> # along with GCC; see the file COPYING3. If not see
> # <http://www.gnu.org/licenses/>.
> @@ -24,6 +24,68 @@ if ![istarget arc*-*-*] then {
> # Load support procs.
> load_lib gcc-dg.exp
>
> +# Return 1 if this is a compiler supporting ARCv2 EM as default processor
> +proc check_effective_target_arcem { } {
> + return [check_no_compiler_messages arcem assembly {
> + #if !defined (__ARCEM__)
> + #error No ARC EM
> + #endif
> + }]
> +}
> +
> +# Return 1 if we compile for ARC700
> +proc check_effective_target_arc700 { } {
> + return [check_no_compiler_messages arc700 assembly {
> + #if !defined (__ARC700__)
> + #error No ARC 700
> + #endif
> + }]
> +}
> +
> +# Return 1 if we compile for ARC6xx
> +proc check_effective_target_arc6xx { } {
> + return [check_no_compiler_messages arc6xx assembly {
> + #if !defined (__ARC600__) && !defined (__ARC601__)
> + #error No ARC 6xx
> + #endif
> + }]
> +}
> +
> +# Return 1 if we have mpy
> +proc check_effective_target_arcmpy { } {
> + return [check_no_compiler_messages arcmpy assembly {
> + #if !defined (__ARC_MPY__)
> + #error No MPY
> + #endif
> + }]
> +}
> +
> +# Return 1 if this is a compiler supporting ARC HS as default processor
> +proc check_effective_target_archs { } {
> + return [check_no_compiler_messages archs assembly {
> + #if !defined (__ARCHS__)
> + #error No ARC HS
> + #endif
> + }]
> +}
> +
> +proc check_cl { flags } {
> + return [check_no_compiler_messages check_$flags assembly {
> + #if !defined (__arc__)
> + #error Extra mcpu options
> + #endif
> + } "$flags"]
> +}
> +
> +# Return 1 if there are no extra mcpu options given via command line
> +proc check_effective_target_clmcpu { } {
> + if { [check_cl "-mcpu=arc700"]
> + && [check_cl "-mcpu=arcem" ] } {
> + return 1
> + }
> + return 0
> +}
> +
> # If a testcase doesn't have special options, use these.
> global DEFAULT_CFLAGS
> if ![info exists DEFAULT_CFLAGS] then {
> diff --git a/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
> b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
> index a0eb6d7..5cfb282 100644
> --- a/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
> +++ b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-O2 -mcpu=ARC601 -mbarrel-shifter" } */
> +/* { dg-options "-O2 -mbarrel-shifter" } */
> int i;
>
> int f (void)
> diff --git a/gcc/testsuite/gcc.target/arc/builtin_simd.c
> b/gcc/testsuite/gcc.target/arc/builtin_simd.c
> index fff27a4..6b02521 100644
> --- a/gcc/testsuite/gcc.target/arc/builtin_simd.c
> +++ b/gcc/testsuite/gcc.target/arc/builtin_simd.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-O2 -Werror-implicit-function-declaration -mARC700 -
> msimd" } */
>
> #define STEST1(name, rettype, op1) \
> diff --git a/gcc/testsuite/gcc.target/arc/builtin_simdarc.c
> b/gcc/testsuite/gcc.target/arc/builtin_simdarc.c
> index 68aae40..0cfe2ad 100644
> --- a/gcc/testsuite/gcc.target/arc/builtin_simdarc.c
> +++ b/gcc/testsuite/gcc.target/arc/builtin_simdarc.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=archs -O2 -Werror-implicit-function-declaration -
> mmpy-option=9" } */
>
> #define STEST(name, rettype, op1type, op2type) \
> diff --git a/gcc/testsuite/gcc.target/arc/cmem-1.c
> b/gcc/testsuite/gcc.target/arc/cmem-1.c
> index 7f36afb..8ed5dcf 100644
> --- a/gcc/testsuite/gcc.target/arc/cmem-1.c
> +++ b/gcc/testsuite/gcc.target/arc/cmem-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mcmem" } */
>
> #define CMEM_SECTION_ATTR __attribute__ ((section (".cmem")));
> diff --git a/gcc/testsuite/gcc.target/arc/cmem-2.c
> b/gcc/testsuite/gcc.target/arc/cmem-2.c
> index a3d7c130..39bfb28 100644
> --- a/gcc/testsuite/gcc.target/arc/cmem-2.c
> +++ b/gcc/testsuite/gcc.target/arc/cmem-2.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mcmem" } */
>
> #define CMEM_SECTION_ATTR __attribute__ ((section (".cmem")));
> diff --git a/gcc/testsuite/gcc.target/arc/cmem-3.c
> b/gcc/testsuite/gcc.target/arc/cmem-3.c
> index dee73b5..109084f 100644
> --- a/gcc/testsuite/gcc.target/arc/cmem-3.c
> +++ b/gcc/testsuite/gcc.target/arc/cmem-3.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mcmem" } */
>
> #define CMEM_SECTION_ATTR __attribute__ ((section
> (".cmem_private")));
> diff --git a/gcc/testsuite/gcc.target/arc/cmem-4.c
> b/gcc/testsuite/gcc.target/arc/cmem-4.c
> index 1da6bce..4ac8a22 100644
> --- a/gcc/testsuite/gcc.target/arc/cmem-4.c
> +++ b/gcc/testsuite/gcc.target/arc/cmem-4.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mcmem" } */
>
> #define CMEM_SECTION_ATTR __attribute__ ((section
> (".cmem_private")));
> diff --git a/gcc/testsuite/gcc.target/arc/cmem-5.c
> b/gcc/testsuite/gcc.target/arc/cmem-5.c
> index ad6904f..451218b 100644
> --- a/gcc/testsuite/gcc.target/arc/cmem-5.c
> +++ b/gcc/testsuite/gcc.target/arc/cmem-5.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mcmem" } */
>
> #define CMEM_SECTION_ATTR __attribute__ ((section
> (".cmem_shared")));
> diff --git a/gcc/testsuite/gcc.target/arc/cmem-6.c
> b/gcc/testsuite/gcc.target/arc/cmem-6.c
> index 24bc39b..0ed0608 100644
> --- a/gcc/testsuite/gcc.target/arc/cmem-6.c
> +++ b/gcc/testsuite/gcc.target/arc/cmem-6.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mcmem" } */
>
> #define CMEM_SECTION_ATTR __attribute__ ((section
> (".cmem_shared")));
> diff --git a/gcc/testsuite/gcc.target/arc/cmem-7.c
> b/gcc/testsuite/gcc.target/arc/cmem-7.c
> index 72ee7bd..0267327 100644
> --- a/gcc/testsuite/gcc.target/arc/cmem-7.c
> +++ b/gcc/testsuite/gcc.target/arc/cmem-7.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mcmem" } */
>
> struct some_struct
> diff --git a/gcc/testsuite/gcc.target/arc/extzv-1.c
> b/gcc/testsuite/gcc.target/arc/extzv-1.c
> index 242f522..1e5533a7 100644
> --- a/gcc/testsuite/gcc.target/arc/extzv-1.c
> +++ b/gcc/testsuite/gcc.target/arc/extzv-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct foo { unsigned a: 3, b: 5, c: 24; };
> diff --git a/gcc/testsuite/gcc.target/arc/insv-1.c
> b/gcc/testsuite/gcc.target/arc/insv-1.c
> index 75d47e9..29e4188 100644
> --- a/gcc/testsuite/gcc.target/arc/insv-1.c
> +++ b/gcc/testsuite/gcc.target/arc/insv-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> /* ??? Irrespective of insn set, generated code for this is a mess. */
> diff --git a/gcc/testsuite/gcc.target/arc/insv-2.c
> b/gcc/testsuite/gcc.target/arc/insv-2.c
> index 1652551..620acec 100644
> --- a/gcc/testsuite/gcc.target/arc/insv-2.c
> +++ b/gcc/testsuite/gcc.target/arc/insv-2.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct foo { unsigned a: 3, b: 8, c: 21; } bar;
> diff --git a/gcc/testsuite/gcc.target/arc/interrupt-1.c
> b/gcc/testsuite/gcc.target/arc/interrupt-1.c
> index 7051457..8a2002b 100644
> --- a/gcc/testsuite/gcc.target/arc/interrupt-1.c
> +++ b/gcc/testsuite/gcc.target/arc/interrupt-1.c
> @@ -1,5 +1,10 @@
> +#if defined (__ARCHS__) || defined (__ARCEM__)
> +void __attribute__ ((interrupt("ilink")))
> +#else
> void __attribute__ ((interrupt("ilink1")))
> +#endif
> handler1 (void)
> {
> }
> -/* { dg-final { scan-assembler-times "j.*\[ilink1\]" 1 } } */
> +/* { dg-final { scan-assembler-times "j.*\[ilink1\]" 1 { target { arc700 ||
> arc6xx } } } } */
> +/* { dg-final { scan-assembler-times "rtie" 1 { target { arcem || archs } }
> } } */
> diff --git a/gcc/testsuite/gcc.target/arc/interrupt-2.c
> b/gcc/testsuite/gcc.target/arc/interrupt-2.c
> index ee8593b..285ebd5 100644
> --- a/gcc/testsuite/gcc.target/arc/interrupt-2.c
> +++ b/gcc/testsuite/gcc.target/arc/interrupt-2.c
> @@ -1,3 +1,4 @@
> +/* { dg-skip-if "ilink2 is not an ARCv2 register" { archs || arcem } } */
> void __attribute__ ((interrupt("ilink2")))
> handler1 (void)
> {
> diff --git a/gcc/testsuite/gcc.target/arc/interrupt-3.c
> b/gcc/testsuite/gcc.target/arc/interrupt-3.c
> index fa598d6..b0cad88 100644
> --- a/gcc/testsuite/gcc.target/arc/interrupt-3.c
> +++ b/gcc/testsuite/gcc.target/arc/interrupt-3.c
> @@ -5,7 +5,7 @@ handler0 (void)
>
> void __attribute__ ((interrupt("you load too")))
> handler1 (void)
> -{ /* { dg-warning "is not \"ilink1\" or \"ilink2\"" } */
> +{ /* { dg-warning "is not \"ilink" } */
> }
>
> void __attribute__ ((interrupt(42)))
> diff --git a/gcc/testsuite/gcc.target/arc/jump-around-jump.c
> b/gcc/testsuite/gcc.target/arc/jump-around-jump.c
> index 338c667..2fd3fb6 100644
> --- a/gcc/testsuite/gcc.target/arc/jump-around-jump.c
> +++ b/gcc/testsuite/gcc.target/arc/jump-around-jump.c
> @@ -1,5 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-Os -mlock -mswape -mrtsc -fno-reorder-blocks" } */
> +/* { dg-options "-Os -mlock -mswape -fno-reorder-blocks" } */
>
> /* This caused an ICE in arc_ifcvt when the 1->3 state change was not
> implemented for TYPE_UNCOND_BRANCH in arc_ccfsm_post_advance. */
> diff --git a/gcc/testsuite/gcc.target/arc/mA6.c
> b/gcc/testsuite/gcc.target/arc/mA6.c
> index 2e15a86..c4eeb6f 100644
> --- a/gcc/testsuite/gcc.target/arc/mA6.c
> +++ b/gcc/testsuite/gcc.target/arc/mA6.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mA6" } */
>
> /* { dg-final { scan-assembler ".cpu ARC600" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mA7.c
> b/gcc/testsuite/gcc.target/arc/mA7.c
> index c4430f4..a3c6f82 100644
> --- a/gcc/testsuite/gcc.target/arc/mA7.c
> +++ b/gcc/testsuite/gcc.target/arc/mA7.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mA7" } */
>
> /* { dg-final { scan-assembler ".cpu ARC700" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mARC600.c
> b/gcc/testsuite/gcc.target/arc/mARC600.c
> index 20e086a..6a80457 100644
> --- a/gcc/testsuite/gcc.target/arc/mARC600.c
> +++ b/gcc/testsuite/gcc.target/arc/mARC600.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mARC600" } */
>
> /* { dg-final { scan-assembler ".cpu ARC600" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mARC601.c
> b/gcc/testsuite/gcc.target/arc/mARC601.c
> index 1d30da4..d238661 100644
> --- a/gcc/testsuite/gcc.target/arc/mARC601.c
> +++ b/gcc/testsuite/gcc.target/arc/mARC601.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mARC601" } */
>
> -/* { dg-final { scan-assembler ".cpu ARC601" } } */
> +/* { dg-final { scan-assembler ".cpu ARC60.*" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mARC700.c
> b/gcc/testsuite/gcc.target/arc/mARC700.c
> index 43e9baa..d34583f 100644
> --- a/gcc/testsuite/gcc.target/arc/mARC700.c
> +++ b/gcc/testsuite/gcc.target/arc/mARC700.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mARC700" } */
>
> /* { dg-final { scan-assembler ".cpu ARC700" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
> b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
> index 4c915fd..bd1dc95 100644
> --- a/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
> +++ b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-mcpu=ARC600" } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> +/* { dg-options "-mcpu=arc600" } */
>
> /* { dg-final { scan-assembler ".cpu ARC600" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
> b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
> index 7c93c9d..8ef046e 100644
> --- a/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
> +++ b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-mcpu=ARC601" } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> +/* { dg-options "-mcpu=arc601" } */
>
> -/* { dg-final { scan-assembler ".cpu ARC601" } } */
> +/* { dg-final { scan-assembler ".cpu ARC60.*" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
> b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
> index c805a5a..25bb400 100644
> --- a/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
> +++ b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> -/* { dg-options "-mcpu=ARC700" } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> +/* { dg-options "-mcpu=arc700" } */
>
> /* { dg-final { scan-assembler ".cpu ARC700" } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mcrc.c
> b/gcc/testsuite/gcc.target/arc/mcrc.c
> deleted file mode 100644
> index a449bdd..0000000
> --- a/gcc/testsuite/gcc.target/arc/mcrc.c
> +++ /dev/null
> @@ -1,8 +0,0 @@
> -/* { dg-options "-mcrc" } */
> -/* { dg-do assemble } */
> -
> -int f (int i)
> -{
> - __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mdpfp.c
> b/gcc/testsuite/gcc.target/arc/mdpfp.c
> index 4bbc905..aa6bdfa 100644
> --- a/gcc/testsuite/gcc.target/arc/mdpfp.c
> +++ b/gcc/testsuite/gcc.target/arc/mdpfp.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "FPX cannot execute on ARC HS" { archs } } */
> /* { dg-options "-O2 -mdpfp" } */
>
> double i;
> diff --git a/gcc/testsuite/gcc.target/arc/mdsp-packa.c
> b/gcc/testsuite/gcc.target/arc/mdsp-packa.c
> deleted file mode 100644
> index f013a6d..0000000
> --- a/gcc/testsuite/gcc.target/arc/mdsp-packa.c
> +++ /dev/null
> @@ -1,9 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mdsp-packa" } */
> -/* { dg-do assemble } */
> -
> -int f (int i)
> -{
> - __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mdvbf.c
> b/gcc/testsuite/gcc.target/arc/mdvbf.c
> deleted file mode 100644
> index e2e545e..0000000
> --- a/gcc/testsuite/gcc.target/arc/mdvbf.c
> +++ /dev/null
> @@ -1,9 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mdvbf" } */
> -/* { dg-do assemble } */
> -
> -int f (int i)
> -{
> - __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mmac-24.c
> b/gcc/testsuite/gcc.target/arc/mmac-24.c
> deleted file mode 100644
> index 89da0b1..0000000
> --- a/gcc/testsuite/gcc.target/arc/mmac-24.c
> +++ /dev/null
> @@ -1,8 +0,0 @@
> -/* { dg-options "-mmac-24" } */
> -/* { dg-do assemble } */
> -
> -int f (int i)
> -{
> - __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mmac-d16.c
> b/gcc/testsuite/gcc.target/arc/mmac-d16.c
> deleted file mode 100644
> index 0570011..0000000
> --- a/gcc/testsuite/gcc.target/arc/mmac-d16.c
> +++ /dev/null
> @@ -1,9 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mmac-d16" } */
> -/* { dg-do assemble } */
> -
> -int f (int i)
> -{
> - __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mno-crc.c
> b/gcc/testsuite/gcc.target/arc/mno-crc.c
> deleted file mode 100644
> index 70ab9c1..0000000
> --- a/gcc/testsuite/gcc.target/arc/mno-crc.c
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mno-crc" } */
> -/* Would also like to assemble and check that we get the expected
> - "Error: bad instruction" assembler messages, but at the moment our
> - testharness can't do that. */
> -
> -int f (int i)
> -{
> - __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
> b/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
> deleted file mode 100644
> index eb21522..0000000
> --- a/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mno-dsp-packa" } */
> -/* Would also like to assemble and check that we get the expected
> - "Error: bad instruction" assembler messages, but at the moment our
> - testharness can't do that. */
> -
> -int f (int i)
> -{
> - __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mno-dvbf.c
> b/gcc/testsuite/gcc.target/arc/mno-dvbf.c
> deleted file mode 100644
> index ea96d98..0000000
> --- a/gcc/testsuite/gcc.target/arc/mno-dvbf.c
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mno-dvbf" } */
> -/* Would also like to assemble and check that we get the expected
> - "Error: bad instruction" assembler messages, but at the moment our
> - testharness can't do that. */
> -
> -int f (int i)
> -{
> - __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-24.c
> b/gcc/testsuite/gcc.target/arc/mno-mac-24.c
> deleted file mode 100644
> index b483957..0000000
> --- a/gcc/testsuite/gcc.target/arc/mno-mac-24.c
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mno-mac-24" } */
> -/* Would also like to assemble and check that we get the expected
> - "Error: bad instruction" assembler messages, but at the moment our
> - testharness can't do that. */
> -
> -int f (int i)
> -{
> - __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
> b/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
> deleted file mode 100644
> index 68a20f4..0000000
> --- a/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mno-mac-d16" } */
> -/* Would also like to assemble and check that we get the expected
> - "Error: bad instruction" assembler messages, but at the moment our
> - testharness can't do that. */
> -
> -int f (int i)
> -{
> - __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mno-rtsc.c
> b/gcc/testsuite/gcc.target/arc/mno-rtsc.c
> deleted file mode 100644
> index d74a60e..0000000
> --- a/gcc/testsuite/gcc.target/arc/mno-rtsc.c
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mno-rtsc" } */
> -/* Would also like to assemble and check that we get the expected
> - "Error: bad instruction" assembler messages, but at the moment our
> - testharness can't do that. */
> -
> -int f (int i)
> -{
> - __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mno-xy.c
> b/gcc/testsuite/gcc.target/arc/mno-xy.c
> deleted file mode 100644
> index e378b3f..0000000
> --- a/gcc/testsuite/gcc.target/arc/mno-xy.c
> +++ /dev/null
> @@ -1,10 +0,0 @@
> -/* { dg-do compile } */
> -/* { dg-options "-mno-xy" } */
> -/* Would also like to assemble and check that we get the expected
> - "Error: bad instruction" assembler messages, but at the moment our
> - testharness can't do that. */
> -
> -void f (int i)
> -{
> - __asm__("add x0_u0, x0_u0, %0" : : "r" (i));
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/movb-1.c
> b/gcc/testsuite/gcc.target/arc/movb-1.c
> index 65d4ba4..965fd66 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-1.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct { unsigned a: 5, b: 8, c: 19; } foo;
> diff --git a/gcc/testsuite/gcc.target/arc/movb-2.c
> b/gcc/testsuite/gcc.target/arc/movb-2.c
> index 1ba9976..9bd6d41 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-2.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-2.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct { unsigned a: 23, b: 9; } foo;
> diff --git a/gcc/testsuite/gcc.target/arc/movb-3.c
> b/gcc/testsuite/gcc.target/arc/movb-3.c
> index 0895154..34145d6 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-3.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-3.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct { int a: 23, b: 9; } foo;
> diff --git a/gcc/testsuite/gcc.target/arc/movb-4.c
> b/gcc/testsuite/gcc.target/arc/movb-4.c
> index 89bf2c2..83efad6 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-4.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-4.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct { int a: 13, b: 19; } foo;
> diff --git a/gcc/testsuite/gcc.target/arc/movb-5.c
> b/gcc/testsuite/gcc.target/arc/movb-5.c
> index 9dbe8a1..0bcdd1c 100644
> --- a/gcc/testsuite/gcc.target/arc/movb-5.c
> +++ b/gcc/testsuite/gcc.target/arc/movb-5.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct { int a: 23, b: 9; } foo;
> diff --git a/gcc/testsuite/gcc.target/arc/movb_cl-1.c
> b/gcc/testsuite/gcc.target/arc/movb_cl-1.c
> index 402250c..977a0c2 100644
> --- a/gcc/testsuite/gcc.target/arc/movb_cl-1.c
> +++ b/gcc/testsuite/gcc.target/arc/movb_cl-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> int
> diff --git a/gcc/testsuite/gcc.target/arc/movb_cl-2.c
> b/gcc/testsuite/gcc.target/arc/movb_cl-2.c
> index d2e5a94..4a1484a 100644
> --- a/gcc/testsuite/gcc.target/arc/movb_cl-2.c
> +++ b/gcc/testsuite/gcc.target/arc/movb_cl-2.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> extern void g (void);
> diff --git a/gcc/testsuite/gcc.target/arc/movbi_cl-1.c
> b/gcc/testsuite/gcc.target/arc/movbi_cl-1.c
> index 3c457db..a86d06f 100644
> --- a/gcc/testsuite/gcc.target/arc/movbi_cl-1.c
> +++ b/gcc/testsuite/gcc.target/arc/movbi_cl-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> int
> diff --git a/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> b/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> index 220cd9d..13c0f34 100644
> --- a/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> +++ b/gcc/testsuite/gcc.target/arc/movh_cl-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> struct thing
> diff --git a/gcc/testsuite/gcc.target/arc/movl-1.c
> b/gcc/testsuite/gcc.target/arc/movl-1.c
> index f1f0130..c44ca8d 100644
> --- a/gcc/testsuite/gcc.target/arc/movl-1.c
> +++ b/gcc/testsuite/gcc.target/arc/movl-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -O2 -mbitops" } */
>
> int
> diff --git a/gcc/testsuite/gcc.target/arc/mrtsc.c
> b/gcc/testsuite/gcc.target/arc/mrtsc.c
> deleted file mode 100644
> index 15cb939..0000000
> --- a/gcc/testsuite/gcc.target/arc/mrtsc.c
> +++ /dev/null
> @@ -1,8 +0,0 @@
> -/* { dg-options "-mrtsc" } */
> -/* { dg-do assemble } */
> -
> -int f (int i)
> -{
> - __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
> - return i;
> -}
> diff --git a/gcc/testsuite/gcc.target/arc/mspfp.c
> b/gcc/testsuite/gcc.target/arc/mspfp.c
> index 0e41ff8..19cb978 100644
> --- a/gcc/testsuite/gcc.target/arc/mspfp.c
> +++ b/gcc/testsuite/gcc.target/arc/mspfp.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "FPX is not an ARC HS extension" { archs } } */
> /* { dg-options "-O2 -mspfp" } */
>
> float i;
> diff --git a/gcc/testsuite/gcc.target/arc/mul64.c
> b/gcc/testsuite/gcc.target/arc/mul64.c
> index 3678b27..680dfd8 100644
> --- a/gcc/testsuite/gcc.target/arc/mul64.c
> +++ b/gcc/testsuite/gcc.target/arc/mul64.c
> @@ -1,5 +1,6 @@
> /* { dg-do compile } */
> -/* { dg-options "-O2 -mcpu=ARC600 -mmul64" } */
> +/* { dg-skip-if "MUL64 is ARC600 extension" { ! { arc6xx } } } */
> +/* { dg-options "-O2 -mcpu=arc600 -mmul64" } */
> #include <stdint.h>
>
> int64_t i;
> diff --git a/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c
> b/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c
> index 398ecfe..fd48f65 100644
> --- a/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c
> +++ b/gcc/testsuite/gcc.target/arc/mulsi3_highpart-1.c
> @@ -1,5 +1,5 @@
> /* { dg-do run } */
> -/* { dg-options "-O2 -mARC700 --save-temps" } */
> +/* { dg-options "-O2" } */
>
> #include <stdlib.h>
>
> @@ -25,4 +25,5 @@ main (void)
> return 0;
> }
>
> -/* { dg-final { scan-assembler "mpyhu\[ \t\]" } } */
> +/* { dg-final { scan-assembler "mpyhu\[ \t\]" { target { arc700 } } } } */
> +/* { dg-final { scan-assembler "mpy.u\[ \t\]" { target { { ! { arc700 } } &&
> arcmpy } } } } */
> diff --git a/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c
> b/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c
> index ccc74e7..287d96d 100644
> --- a/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c
> +++ b/gcc/testsuite/gcc.target/arc/mulsi3_highpart-2.c
> @@ -1,5 +1,7 @@
> /* { dg-do run } */
> -/* { dg-options "-O2 -mARC700 --save-temps -mno-mpy" } */
> +/* { dg-skip-if "ARC700 always has mpy option on" { arc700 } } */
> +/* { dg-skip-if "ARC600 doesn't have mpy instruction" { arc6xx } } */
> +/* { dg-options "-O2 --save-temps -mmpy-option=0" } */
>
> #include <stdlib.h>
>
> diff --git a/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
> b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
> index e4e23e4..61f07b5 100644
> --- a/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
> +++ b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "FPX cannot execute on ARC HS" { archs } } */
> /* { dg-options "-O2 -mdpfp -mno-dpfp-lrsr" } */
>
> double i;
> diff --git a/gcc/testsuite/gcc.target/arc/nps400-1.c
> b/gcc/testsuite/gcc.target/arc/nps400-1.c
> index f3d6271..504aad7 100644
> --- a/gcc/testsuite/gcc.target/arc/nps400-1.c
> +++ b/gcc/testsuite/gcc.target/arc/nps400-1.c
> @@ -1,4 +1,5 @@
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mcpu=nps400 -mq-class -mbitops -munaligned-access -
> mcmem -O2 -fno-strict-aliasing" } */
>
> enum npsdp_mem_space_type {
> diff --git a/gcc/testsuite/gcc.target/arc/trsub.c
> b/gcc/testsuite/gcc.target/arc/trsub.c
> index 031935f..8ea5711 100644
> --- a/gcc/testsuite/gcc.target/arc/trsub.c
> +++ b/gcc/testsuite/gcc.target/arc/trsub.c
> @@ -1,6 +1,7 @@
> /* Tests if we generate rsub instructions when compiling using
> floating point assist instructions. */
> /* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> /* { dg-options "-mfpu=fpuda -mcpu=arcem" } */
>
> double foo (double a)
> diff --git a/gcc/testsuite/gcc.target/arc/va_args-1.c
> b/gcc/testsuite/gcc.target/arc/va_args-1.c
> new file mode 100644
> index 0000000..4a35d12
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/va_args-1.c
> @@ -0,0 +1,16 @@
> +/* { dg-do run } */
> +/* { dg-options "-O2" } */
> +/* { dg-additional-sources "abitest.S" } */
> +
> +extern long tsyscall (long int sysnum, ...);
> +
> +int main (void)
> +{
> + long a;
> +
> + a = tsyscall (1, 2, 3, 4, 5, 6, 7);
> +
> + if (a != 28)
> + return 1;
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/arc/va_args-2.c
> b/gcc/testsuite/gcc.target/arc/va_args-2.c
> new file mode 100644
> index 0000000..1a49251
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/va_args-2.c
> @@ -0,0 +1,14 @@
> +/* { dg-do run } */
> +/* { dg-options "-O2" } */
> +/* { dg-additional-sources "abitest.S" } */
> +
> +extern int clone (int (*fn)(void *), void *child_stack,
> + int flags, void *arg, ...);
> +
> +int main (void)
> +{
> + int a = clone ((void *) 1, (void *)2, 3, (void *) 4, 5, 6, 7);
> + if (a != 28)
> + return 1;
> + return 0;
> +}
> diff --git a/gcc/testsuite/gcc.target/arc/va_args-3.c
> b/gcc/testsuite/gcc.target/arc/va_args-3.c
> new file mode 100644
> index 0000000..45624c1
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/va_args-3.c
> @@ -0,0 +1,15 @@
> +/* { dg-do run } */
> +/* { dg-options "-O2" } */
> +/* { dg-additional-sources "abitest.S" } */
> +
> +extern long long abidi (int a, ...);
> +
> +int main (void)
> +{
> + long long a = 1;
> + a = abidi (10, a);
> +
> + if (a != 2)
> + return 1;
> + return 0;
> +}
> --
> 1.9.1
