On Wed, Nov 9, 2016 at 8:25 PM, Uros Bizjak <ubiz...@gmail.com> wrote:
> Hello!
>
> We need earlyclobber on output operand of doubleword shift insns,
> since we have to prevent (partial) output matching %ecx as count
> argument.
>
> 2016-11-09 Uros Bizjak <ubiz...@gmail.com>
>
> PR target/78262
> * config/i386/i386.md (*<shift_insn><mode>3_doubleword): Mark
> operand 0 as earlyclobber.
>
> testsuite/ChangeLog:
>
> 2016-11-09 Uros Bizjak <ubiz...@gmail.com>
>
> PR target/78262
> * gcc.target/i386/pr78262.c: New test.
>
> Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
>
> Committed to mainline, will be backported to release branches.
Actually, we have also to add earlyclobber to all operand 0
alternatives of *ashl<mode>3_doubleword pattern to prevent similar
issue.
PR target/78262
* config/i386/i386.md (*<shift_insn><mode>3_doubleword): Mark
operand 0 as earlyclobber.
(*ashl<mode>3_doubleword): Ditto for all operand 0 alternatives.
I have amended the patch with attached part.
Uros.
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 242076)
+++ config/i386/i386.md (working copy)
@@ -9704,7 +9704,7 @@
"ix86_expand_binary_operator (ASHIFT, <MODE>mode, operands); DONE;")
(define_insn "*ashl<mode>3_doubleword"
- [(set (match_operand:DWI 0 "register_operand" "=&r,r")
+ [(set (match_operand:DWI 0 "register_operand" "=&r,&r")
(ashift:DWI (match_operand:DWI 1 "reg_or_pm1_operand" "n,0")
(match_operand:QI 2 "nonmemory_operand" "<S>c,<S>c")))
(clobber (reg:CC FLAGS_REG))]
