The attached patch fixes PR/77822 on s390/s390x dor gcc-6 *only*.
See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77822
Bootstrapped and regression tested on s390 and s390x biarch on a
zEC12.
For gcc-7, there will be a different patch.
Ciao
Dominik ^_^ ^_^
--
Dominik Vogt
IBM Germany
gcc/ChangeLog
* config/s390/s390.md ("extzv", "*extzv<mode>_zEC12")
("*extzv<mode>_z10"): Check validity of zero_extend arguments.
gcc/testsuite/ChangeLog
* gcc.target/s390/pr77822.c: New test for PR/77822.
>From 5c007442158756a36f2ede66f372a42d9a7b2aa6 Mon Sep 17 00:00:00 2001
From: Dominik Vogt <v...@linux.vnet.ibm.com>
Date: Tue, 8 Nov 2016 09:54:03 +0100
Subject: [PATCH] S390: Fix PR/77822.
Check the range of the arguments in extzv patterns. This avoids generating
risbg instructions with an out of range shift count.
---
gcc/config/s390/s390.md | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index b3d4370..899ed62 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -3708,6 +3708,10 @@
(clobber (reg:CC CC_REGNUM))])]
"TARGET_Z10"
{
+ if (!IN_RANGE (INTVAL (operands[3]), 0, GET_MODE_BITSIZE (DImode) - 1)
+ || !IN_RANGE (INTVAL (operands[3]) + INTVAL (operands[2]), 1,
+ GET_MODE_BITSIZE (DImode)))
+ FAIL;
/* Starting with zEC12 there is risbgn not clobbering CC. */
if (TARGET_ZEC12)
{
@@ -3726,7 +3730,9 @@
(match_operand:GPR 1 "register_operand" "d")
(match_operand 2 "const_int_operand" "") ; size
(match_operand 3 "const_int_operand" "")))] ; start]
- "TARGET_ZEC12"
+ "TARGET_ZEC12
+ && IN_RANGE (INTVAL (operands[3]), 0, GET_MODE_BITSIZE (DImode) - 1)
+ && IN_RANGE (INTVAL (operands[3]) + INTVAL (operands[2]), 1,
GET_MODE_BITSIZE (DImode))"
"risbgn\t%0,%1,64-%2,128+63,<bitsize>+%3+%2" ; dst, src, start, end, shift
[(set_attr "op_type" "RIE")])
@@ -3737,7 +3743,9 @@
(match_operand 2 "const_int_operand" "") ; size
(match_operand 3 "const_int_operand" ""))) ; start
(clobber (reg:CC CC_REGNUM))]
- "TARGET_Z10"
+ "TARGET_Z10
+ && IN_RANGE (INTVAL (operands[3]), 0, GET_MODE_BITSIZE (DImode) - 1)
+ && IN_RANGE (INTVAL (operands[3]) + INTVAL (operands[2]), 1,
GET_MODE_BITSIZE (DImode))"
"risbg\t%0,%1,64-%2,128+63,<bitsize>+%3+%2" ; dst, src, start, end, shift
[(set_attr "op_type" "RIE")
(set_attr "z10prop" "z10_super_E1")])
--
2.3.0
