Recently added support for ARMv8.2-A
(https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01240.html) included a
number of changes to improve data movement, particularly for HI and HF
mode values. These included the use of the Thumb-2 instruction MOVW and
of the new VMOV.F16 instruction. There are problems with both: the use
of MOVW isn't properly guarded so that it can be generated for targets
that don't support it and the VMOV.F16 instruction is wrongly marked as
being predicable.
This patch adds guards to the use of the MOVW so that it is only
generated when the target supports Thumb-2 and fixes the predication on
the VMOV.F16 instruction.
Tested for arm-none-linux-gnueabihf with native bootstrap and make check
on ARMv8-A and for arm-none-eabi with cross compiled check-gcc on an
ARMv8.2-A emulator.
There is one failure on arm-none-linux-gnueabihf,
gcc.dg/guality/pr36728-1.c which is due to MOVW not being generated,
even for ARMv7-A. The generated code is otherwise correct. I think I
understand why MOVW isn't being emitted but it'll take time to test
properly.
Since this patch is to fix a broken build is it OK to commit it and to fix
the poor code-gen in a follow-up patch?
Matthew
gcc/
2016-09-27 Matthew Wahab <matthew.wa...@arm.com>
* config/arm/arm.md (*arm_movsi_insn): Add "arch" attribute.
* config/arm/vfp.md (*arm_movhi_vfp): Likewise.
(*thumb2_movhi_vfp): Likewise.
(*arm_movhi_fp16): Remove predication operand from VMOV.F16
template. Expand predicable attribute to mark VMOV.F16 as not
predicable. Add "arch" attribute.
(*thumb2_movhi_fp16): Likewise.
(*arm_movsi_vfp): Break a long line. Add "arch" attribute.
(*thumb2_movsi_vfp): Add "arch" attribute.
>From bedba58f504ef1f68ee0f90d9e34563b75653ae5 Mon Sep 17 00:00:00 2001
From: Matthew Wahab <matthew.wa...@arm.com>
Date: Mon, 26 Sep 2016 12:05:34 +0100
Subject: [PATCH] [ARM] Fix invalid instructions generated for data movement.
Recently added support for ARMv8.2-A
(https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01240.html) included a
number of changes to improve data movement, particularly for HI and HF
mode values. These included the use of the Thumb-2 instruction MOVW and
of the new VMOV.F16 instruction. There are problems with both: the use
of MOVW isn't properly guarded so that it can be generated for targets
that don't support it. The VMOV.F16 instruction is wrongly marked as
being predicable.
This patch adds guards to the use of the MOVW so that it is only
generated when the target supports Thumb-2 and fixes the predication on
the VMOV.F16 instruction.
Tested for arm-none-linux-gnueabihf with native bootstrap and make check
on ARMv8-A and for arm-none-eabi with cross compiled check-gcc on an
ARMv8.2-A emulator.
There is one failure on arm-none-linux-gnueabihf,
gcc.dg/guality/pr36728-1.c which is due to MOVW not being generated,
even for ARMv7-A. The generated code is otherwise correct. I think I
understand why MOVW isn't being emitted but it'll take time to test
properly.
Since this patch is to fix a broken build is it OK to commit and to fix
the poor code-gen in a follow-up patch?
gcc/
2016-09-27 Matthew Wahab <matthew.wa...@arm.com>
* config/arm/arm.md (*arm_movsi_insn): Add "arch" attribute.
* config/arm/vfp.md (*arm_movhi_vfp): Likewise.
(*thumb2_movhi_vfP): Likewise.
(*arm_movhi_fp16): Remove predication operand from VMOV.F16
template. Expand predicable attribute to mark VMOV.F16 as not
predicable. Add "arch" attribute.
(*thumb2_movhi_fp16): Likewise.
(*arm_movsi_vfp): Break a long line. Add "arch" attribute.
(*thum2_movsi_vfp): Add "arch" attribute.
---
gcc/config/arm/arm.md | 1 +
gcc/config/arm/vfp.md | 18 +++++++++++++-----
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 411754f..999292b 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -6065,6 +6065,7 @@
[(set_attr "type" "mov_reg,mov_imm,mvn_imm,mov_imm,load1,store1")
(set_attr "predicable" "yes")
(set_attr "pool_range" "*,*,*,*,4096,*")
+ (set_attr "arch" "*,*,*,t2,*,*")
(set_attr "neg_pool_range" "*,*,*,*,4084,*")]
)
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index 5d22c34..21eaf48 100644
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -65,6 +65,7 @@
(const_string "f_mcr")
(const_string "f_mrc")
(const_string "fmov")])
+ (set_attr "arch" "*, *, t2, *, *, *, *, *")
(set_attr "pool_range" "*, *, *, *, 256, *, *, *")
(set_attr "neg_pool_range" "*, *, *, *, 244, *, *, *")
(set_attr "length" "4")]
@@ -108,6 +109,7 @@
(set_attr "type"
"mov_reg, mov_imm, mov_imm, mov_imm, store1, load1,\
f_mcr, f_mrc, fmov")
+ (set_attr "arch" "*, *, *, t2, *, *, *, *, *")
(set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *")
(set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *")
(set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4")]
@@ -139,14 +141,14 @@
return "ldrh%?\t%0, %1\t%@ movhi";
case 5:
case 6:
- return "vmov%?.f16\t%0, %1\t%@ int";
+ return "vmov.f16\t%0, %1\t%@ int";
case 7:
return "vmov%?.f32\t%0, %1\t%@ int";
default:
gcc_unreachable ();
}
}
- [(set_attr "predicable" "yes")
+ [(set_attr "predicable" "yes, yes, yes, yes, yes, no, no, yes")
(set_attr_alternative "type"
[(if_then_else
(match_operand 1 "const_int_operand" "")
@@ -159,6 +161,7 @@
(const_string "f_mcr")
(const_string "f_mrc")
(const_string "fmov")])
+ (set_attr "arch" "*, *, t2, *, *, *, *, *")
(set_attr "pool_range" "*, *, *, *, 256, *, *, *")
(set_attr "neg_pool_range" "*, *, *, *, 244, *, *, *")
(set_attr "length" "4")]
@@ -188,19 +191,21 @@
return "ldrh%?\t%0, %1\t%@ movhi";
case 6:
case 7:
- return "vmov%?.f16\t%0, %1\t%@ int";
+ return "vmov.f16\t%0, %1\t%@ int";
case 8:
return "vmov%?.f32\t%0, %1\t%@ int";
default:
gcc_unreachable ();
}
}
- [(set_attr "predicable" "yes")
+ [(set_attr "predicable"
+ "yes, yes, yes, yes, yes, yes, no, no, yes")
(set_attr "predicable_short_it"
"yes, no, yes, no, no, no, no, no, no")
(set_attr "type"
"mov_reg, mov_imm, mov_imm, mov_imm, store1, load1,\
f_mcr, f_mrc, fmov")
+ (set_attr "arch" "*, *, *, t2, *, *, *, *, *")
(set_attr "pool_range" "*, *, *, *, *, 4094, *, *, *")
(set_attr "neg_pool_range" "*, *, *, *, *, 250, *, *, *")
(set_attr "length" "2, 4, 2, 4, 4, 4, 4, 4, 4")]
@@ -241,7 +246,9 @@
}
"
[(set_attr "predicable" "yes")
- (set_attr "type" "mov_reg,mov_reg,mvn_imm,mov_imm,load1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores")
+ (set_attr "type" "mov_reg,mov_reg,mvn_imm,mov_imm,load1,store1,
+ f_mcr,f_mrc,fmov,f_loads,f_stores")
+ (set_attr "arch" "*,*,*,t2,*,*,*,*,*,*,*")
(set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*")
(set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
)
@@ -290,6 +297,7 @@
(set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no,no,no,no,no,no")
(set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_imm,load1,load1,store1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores")
(set_attr "length" "2,4,2,4,4,4,4,4,4,4,4,4,4,4")
+ (set_attr "arch" "*,*,*,*,t2,*,*,*,*,*,*,*,*,*")
(set_attr "pool_range" "*,*,*,*,*,1018,4094,*,*,*,*,*,1018,*")
(set_attr "neg_pool_range" "*,*,*,*,*, 0, 0,*,*,*,*,*,1008,*")]
)
--
2.1.4
