2016-08-29  Uros Bizjak  <ubiz...@gmail.com>

    PR target/77403
    * config/i386/sse.md (vec_set_lo_<mode><mask_name>): Fix assembler
    template for intel asm dialect.
    (vec_set_hi_<mode><mask_name>): Ditto.

testsuite/ChangeLog:

2016-08-29  Uros Bizjak  <ubiz...@gmail.com>

    PR target/77403
    * gcc.target/i386/pr77403.c: New test.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN and release branches.

Uros.
Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md  (revision 239825)
+++ config/i386/sse.md  (working copy)
@@ -12334,7 +12334,7 @@
                       (const_int 12) (const_int 13)
                       (const_int 14) (const_int 15)]))))]
   "TARGET_AVX512DQ"
-  "vinsert<shuffletype>32x8\t{$0x0, %2, %1, 
%0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x0}"
+  "vinsert<shuffletype>32x8\t{$0x0, %2, %1, 
%0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x0}"
   [(set_attr "type" "sselog")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "evex")
@@ -12351,7 +12351,7 @@
                       (const_int 6) (const_int 7)]))
          (match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "vm")))]
   "TARGET_AVX512DQ"
-  "vinsert<shuffletype>32x8\t{$0x1, %2, %1, 
%0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x1}"
+  "vinsert<shuffletype>32x8\t{$0x1, %2, %1, 
%0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x1}"
   [(set_attr "type" "sselog")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "evex")
@@ -12366,7 +12366,7 @@
            (parallel [(const_int 4) (const_int 5)
                       (const_int 6) (const_int 7)]))))]
   "TARGET_AVX512F"
-  "vinsert<shuffletype>64x4\t{$0x0, %2, %1, 
%0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x0}"
+  "vinsert<shuffletype>64x4\t{$0x0, %2, %1, 
%0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x0}"
   [(set_attr "type" "sselog")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "evex")
Index: testsuite/gcc.target/i386/pr77403.c
===================================================================
--- testsuite/gcc.target/i386/pr77403.c (nonexistent)
+++ testsuite/gcc.target/i386/pr77403.c (working copy)
@@ -0,0 +1,15 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target int128 } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-require-effective-target masm_intel } */
+/* { dg-options "-O -mavx512f -masm=intel" } */
+
+typedef __int128 V __attribute__((vector_size(64)));
+
+V v;
+
+void
+foo()
+{
+  v ^= (V){1};
+}

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