2016-07-11 Marek Polacek <pola...@redhat.com>
PR c/7652
* config/i386/driver-i386.c (decode_caches_intel): Likewise.
(detect_caches_cpuid4): Likewise.
* config/i386/i386-c.c (ix86_target_macros_internal): Likewise.
* config/i386/i386.c (function_arg_advance_32): Likewise.
(function_arg_32): Likewise.
(ix86_gimplify_va_arg): Likewise.
(standard_sse_constant_opcode): Likewise.
(ix86_decompose_address): Likewise.
(ix86_legitimate_constant_p): Likewise.
(legitimate_pic_operand_p): Likewise.
(legitimate_pic_address_disp_p): Likewise.
(ix86_legitimate_address_p): Likewise.
(output_pic_addr_const): Likewise.
(print_reg): Likewise.
(ix86_print_operand): Likewise.
(ix86_expand_move): Likewise.
(ix86_build_const_vector): Likewise.
(ix86_match_ccmode): Likewise.
(ix86_expand_branch): Likewise.
(ix86_prepare_sse_fp_compare_args): Likewise.
(ix86_expand_int_sse_cmp): Likewise.
(ix86_adjust_cost): Likewise.
(ix86_sched_init_global): Likewise.
(ix86_expand_multi_arg_builtin): Likewise.
(ix86_expand_args_builtin): Likewise.
(ix86_expand_round_builtin): Likewise.
(ix86_expand_special_args_builtin): Likewise.
(ix86_expand_builtin): Likewise.
(avx_vpermilp_parallel): Likewise.
(ix86_rtx_costs): Likewise.
(ix86_expand_vector_init_duplicate): Likewise.
(ix86_expand_vector_init_one_nonzero): Likewise.
(ix86_expand_vector_init_one_var): Likewise.
(ix86_expand_vector_init_interleave): Likewise.
(ix86_expand_vector_init_general): Likewise.
(ix86_expand_vector_extract): Likewise.
(expand_vec_perm_blend): Likewise.
(canonicalize_perm): Likewise.
(ix86_expand_vecop_qihi): Likewise.
(ix86_preferred_simd_mode): Likewise.
* config/i386/sse.md: Likewise.
diff --git gcc/gcc/config/i386/driver-i386.c gcc/gcc/config/i386/driver-i386.c
index 22a8f28..a84a326 100644
--- gcc/gcc/config/i386/driver-i386.c
+++ gcc/gcc/config/i386/driver-i386.c
@@ -238,6 +238,7 @@ decode_caches_intel (unsigned reg, bool xeon_mp,
break;
case 0x87:
level2->sizekb = 1024; level2->assoc = 8; level2->line = 64;
+ gcc_fallthrough ();
default:
break;
@@ -326,6 +327,7 @@ detect_caches_cpuid4 (struct cache_desc *level1, struct
cache_desc *level2,
* cache->line * sets) / 1024;
}
}
+ gcc_fallthrough ();
default:
break;
}
diff --git gcc/gcc/config/i386/i386-c.c gcc/gcc/config/i386/i386-c.c
index f93a09d..8e5087d 100644
--- gcc/gcc/config/i386/i386-c.c
+++ gcc/gcc/config/i386/i386-c.c
@@ -210,6 +210,7 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
case '3':
def_or_undef (parse_in, "__tune_pentium3__");
/* FALLTHRU */
+ gcc_fallthrough ();
case '2':
def_or_undef (parse_in, "__tune_pentium2__");
break;
diff --git gcc/gcc/config/i386/i386.c gcc/gcc/config/i386/i386.c
index 9eaf414..f7e9845 100644
--- gcc/gcc/config/i386/i386.c
+++ gcc/gcc/config/i386/i386.c
@@ -9284,6 +9284,7 @@ function_arg_advance_32 (CUMULATIVE_ARGS *cum,
machine_mode mode,
if (bytes < 0)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case DImode:
case SImode:
@@ -9312,12 +9313,14 @@ pass_in_reg:
error_p = 1;
if (cum->float_in_sse < 2)
break;
+ gcc_fallthrough ();
case SFmode:
if (cum->float_in_sse == -1)
error_p = 1;
if (cum->float_in_sse < 1)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case V8SFmode:
case V8SImode:
@@ -9547,6 +9550,7 @@ function_arg_32 (CUMULATIVE_ARGS *cum, machine_mode mode,
if (bytes < 0)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case DImode:
case SImode:
case HImode:
@@ -9579,12 +9583,14 @@ pass_in_reg:
error_p = 1;
if (cum->float_in_sse < 2)
break;
+ gcc_fallthrough ();
case SFmode:
if (cum->float_in_sse == -1)
error_p = 1;
if (cum->float_in_sse < 1)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case TImode:
/* In 32bit, we pass TImode in xmm registers. */
case V16QImode:
@@ -10984,6 +10990,7 @@ ix86_gimplify_va_arg (tree valist, tree type,
gimple_seq *pre_p,
container = NULL;
break;
}
+ gcc_fallthrough ();
default:
container = construct_container (nat_mode, TYPE_MODE (type),
@@ -11495,6 +11502,7 @@ standard_sse_constant_opcode (rtx_insn *insn, rtx x)
case MODE_V8SF:
gcc_assert (TARGET_AVX2);
/* FALLTHRU */
+ gcc_fallthrough ();
case MODE_TI:
case MODE_V2DF:
case MODE_V4SF:
@@ -14911,6 +14919,7 @@ ix86_decompose_address (rtx addr, struct ix86_address
*out)
if (GET_CODE (op) != UNSPEC)
return 0;
/* FALLTHRU */
+ gcc_fallthrough ();
case UNSPEC:
if (XINT (op, 1) == UNSPEC_TP
@@ -14925,6 +14934,7 @@ ix86_decompose_address (rtx addr, struct ix86_address
*out)
if (!REG_P (SUBREG_REG (op)))
return 0;
/* FALLTHRU */
+ gcc_fallthrough ();
case REG:
if (!base)
@@ -15186,6 +15196,7 @@ ix86_legitimate_constant_p (machine_mode mode, rtx x)
if (GET_CODE (x) != SYMBOL_REF)
return false;
/* FALLTHRU */
+ gcc_fallthrough ();
case SYMBOL_REF:
/* TLS symbols are never valid. */
@@ -15217,10 +15228,12 @@ ix86_legitimate_constant_p (machine_mode mode, rtx x)
if (TARGET_64BIT)
return true;
/* FALLTHRU */
+ gcc_fallthrough ();
case OImode:
case XImode:
if (!standard_sse_constant_p (x, mode))
return false;
+ gcc_fallthrough ();
default:
break;
}
@@ -15229,6 +15242,7 @@ ix86_legitimate_constant_p (machine_mode mode, rtx x)
case CONST_VECTOR:
if (!standard_sse_constant_p (x, mode))
return false;
+ gcc_fallthrough ();
default:
break;
@@ -15307,6 +15321,7 @@ legitimate_pic_operand_p (rtx x)
return false;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case SYMBOL_REF:
case LABEL_REF:
@@ -15357,6 +15372,7 @@ legitimate_pic_address_disp_p (rtx disp)
if (GET_CODE (op0) != SYMBOL_REF)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case SYMBOL_REF:
/* TLS references should always be enclosed in UNSPEC.
@@ -15613,6 +15629,7 @@ ix86_legitimate_address_p (machine_mode, rtx addr, bool
strict)
&& ix86_force_load_from_GOT_p (XVECEXP (XEXP (disp, 0), 0, 0)))
goto is_legitimate_pic;
/* FALLTHRU */
+ gcc_fallthrough ();
case UNSPEC_GOTOFF:
gcc_assert (flag_pic);
if (!TARGET_64BIT)
@@ -15625,6 +15642,7 @@ ix86_legitimate_address_p (machine_mode, rtx addr, bool
strict)
if (ix86_force_load_from_GOT_p (XVECEXP (XEXP (disp, 0), 0, 0)))
goto is_legitimate_pic;
/* FALLTHRU */
+ gcc_fallthrough ();
case UNSPEC_PCREL:
gcc_assert (flag_pic);
goto is_legitimate_pic;
@@ -16679,6 +16697,7 @@ output_pic_addr_const (FILE *file, rtx x, int code)
case LABEL_REF:
x = XEXP (x, 0);
/* FALLTHRU */
+ gcc_fallthrough ();
case CODE_LABEL:
ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
assemble_name (asm_out_file, buf);
@@ -17292,6 +17311,7 @@ print_reg (rtx x, int code, FILE *file)
case 4:
if (LEGACY_INT_REGNO_P (regno))
putc (msize == 8 && TARGET_64BIT ? 'r' : 'e', file);
+ gcc_fallthrough ();
case 16:
case 12:
case 2:
@@ -17541,6 +17561,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
warning
(0, "non-integer operand used with operand code 'z'");
/* FALLTHRU */
+ gcc_fallthrough ();
case 'Z':
/* 387 opcodes don't get size suffixes if using Intel opcodes. */
@@ -17701,6 +17722,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
fputs ("eq_us", file);
break;
}
+ gcc_fallthrough ();
case EQ:
fputs ("eq", file);
break;
@@ -17710,6 +17732,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
fputs ("nge", file);
break;
}
+ gcc_fallthrough ();
case LT:
fputs ("lt", file);
break;
@@ -17719,6 +17742,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
fputs ("ngt", file);
break;
}
+ gcc_fallthrough ();
case LE:
fputs ("le", file);
break;
@@ -17731,6 +17755,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
fputs ("neq_oq", file);
break;
}
+ gcc_fallthrough ();
case NE:
fputs ("neq", file);
break;
@@ -17740,6 +17765,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
fputs ("ge", file);
break;
}
+ gcc_fallthrough ();
case UNGE:
fputs ("nlt", file);
break;
@@ -17749,6 +17775,7 @@ ix86_print_operand (FILE *file, rtx x, int code)
fputs ("gt", file);
break;
}
+ gcc_fallthrough ();
case UNGT:
fputs ("nle", file);
break;
@@ -19447,6 +19474,7 @@ ix86_expand_move (machine_mode mode, rtx operands[])
op1 = XEXP (tmp, 0);
addend = XEXP (tmp, 1);
/* FALLTHRU */
+ gcc_fallthrough ();
case SYMBOL_REF:
model = SYMBOL_REF_TLS_MODEL (op1);
@@ -19493,6 +19521,7 @@ ix86_expand_move (machine_mode mode, rtx operands[])
return;
op1 = convert_to_mode (mode, op1, 1);
+ gcc_fallthrough ();
default:
break;
@@ -21496,6 +21525,7 @@ ix86_build_const_vector (machine_mode mode, bool vect,
rtx value)
case V4DImode:
case V2DImode:
gcc_assert (vect);
+ gcc_fallthrough ();
case V16SFmode:
case V8SFmode:
case V4SFmode:
@@ -21836,14 +21866,17 @@ ix86_match_ccmode (rtx insn, machine_mode req_mode)
if (req_mode == CCGCmode)
return false;
/* FALLTHRU */
+ gcc_fallthrough ();
case CCGCmode:
if (req_mode == CCGOCmode || req_mode == CCNOmode)
return false;
/* FALLTHRU */
+ gcc_fallthrough ();
case CCGOCmode:
if (req_mode == CCZmode)
return false;
/* FALLTHRU */
+ gcc_fallthrough ();
case CCZmode:
break;
@@ -22481,6 +22514,8 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx
op1, rtx label)
op0 = force_reg (mode, gen_rtx_XOR (mode, op0, op1));
op1 = const0_rtx;
}
+ /* XXX Really fallthru? */
+ gcc_fallthrough ();
case TImode:
/* Expand DImode branch into multiple compare+branch. */
{
@@ -23313,6 +23348,7 @@ ix86_prepare_sse_fp_compare_args (rtx dest, enum
rtx_code code,
if (!dest || !rtx_equal_p (dest, *pop1))
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case GE:
case GT:
@@ -23892,6 +23928,7 @@ ix86_expand_int_sse_cmp (rtx dest, enum rtx_code code,
rtx cop0, rtx cop1,
code = reverse_condition (code);
*negate = true;
/* FALLTHRU */
+ gcc_fallthrough ();
case LT:
case LTU:
@@ -28915,6 +28952,7 @@ ix86_adjust_cost (rtx_insn *insn, rtx link, rtx_insn
*dep_insn, int cost)
&& (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP))
return 0;
/* FALLTHRU */
+ gcc_fallthrough ();
case PROCESSOR_ATHLON:
case PROCESSOR_K8:
@@ -29003,6 +29041,7 @@ ix86_adjust_cost (rtx_insn *insn, rtx link, rtx_insn
*dep_insn, int cost)
}
}
}
+ gcc_fallthrough ();
default:
break;
@@ -29842,6 +29881,7 @@ ix86_sched_init_global (FILE *, int, int)
break;
}
/* ... Fall through ... */
+ gcc_fallthrough ();
default:
targetm.sched.dfa_post_advance_cycle = NULL;
targetm.sched.first_cycle_multipass_init = NULL;
@@ -38725,6 +38765,7 @@ ix86_expand_multi_arg_builtin (enum insn_code icode,
tree exp, rtx target,
goto xop_rotl;
case CODE_FOR_xop_rotlv16qi3:
new_icode = CODE_FOR_rotlv16qi3;
+ gcc_fallthrough ();
xop_rotl:
if (CONST_INT_P (op))
{
@@ -40112,6 +40153,7 @@ ix86_expand_args_builtin (const struct
builtin_description *d,
error ("the next to last argument must be an 8-bit
immediate");
break;
}
+ gcc_fallthrough ();
case 1:
error ("the last argument must be an 8-bit immediate");
break;
@@ -40168,6 +40210,8 @@ ix86_expand_args_builtin (const struct
builtin_description *d,
case 5:
pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
args[2].op, args[3].op, args[4].op);
+ /* XXX Really fallthru? */
+ gcc_fallthrough ();
case 6:
pat = GEN_FCN (icode) (real_target, args[0].op, args[1].op,
args[2].op, args[3].op, args[4].op,
@@ -40542,6 +40586,8 @@ ix86_expand_round_builtin (const struct
builtin_description *d,
case 5:
pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
args[2].op, args[3].op, args[4].op);
+ /* XXX Really fallthru? */
+ gcc_fallthrough ();
case 6:
pat = GEN_FCN (icode) (target, args[0].op, args[1].op,
args[2].op, args[3].op, args[4].op,
@@ -40725,6 +40771,7 @@ ix86_expand_special_args_builtin (const struct
builtin_description *d,
break;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case VOID_FTYPE_PV8SF_V8SI_V8SF:
case VOID_FTYPE_PV4DF_V4DI_V4DF:
case VOID_FTYPE_PV4SF_V4SI_V4SF:
@@ -41973,6 +42020,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx
subtarget,
case IX86_BUILTIN_RDRAND64_STEP:
icode = CODE_FOR_rdranddi_1;
mode0 = DImode;
+ gcc_fallthrough ();
rdrand_step:
op0 = gen_reg_rtx (mode0);
@@ -42024,6 +42072,7 @@ rdrand_step:
case IX86_BUILTIN_RDSEED64_STEP:
icode = CODE_FOR_rdseeddi_1;
mode0 = DImode;
+ gcc_fallthrough ();
rdseed_step:
op0 = gen_reg_rtx (mode0);
@@ -42069,6 +42118,7 @@ rdseed_step:
case IX86_BUILTIN_ADDCARRYX64:
icode = CODE_FOR_addcarrydi;
mode0 = DImode;
+ gcc_fallthrough ();
handlecarry:
arg0 = CALL_EXPR_ARG (exp, 0); /* unsigned char c_in. */
@@ -42149,6 +42199,7 @@ rdseed_step:
icode = CODE_FOR_kortestzhi;
mode0 = HImode;
mode1 = CCZmode;
+ gcc_fallthrough ();
kortest:
arg0 = CALL_EXPR_ARG (exp, 0); /* Mask reg src1. */
@@ -42612,6 +42663,7 @@ rdseed_step:
if (!integer_zerop (gimple_call_arg (def_stmt, 2)))
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case IX86_BUILTIN_CMPEQPD:
case IX86_BUILTIN_CMPEQPS:
if (initializer_zerop (gimple_call_arg (def_stmt, 0))
@@ -42841,6 +42893,7 @@ rdseed_step:
if (!TARGET_SSE)
/* Emit a normal call if SSE isn't available. */
return expand_call (exp, target, ignore);
+ gcc_fallthrough ();
default:
return ix86_expand_args_builtin (d, exp, target);
}
@@ -43772,6 +43825,7 @@ avx_vpermilp_parallel (rtx par, machine_mode mode)
mask |= (ipar[i] - 6) << i;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case V4DFmode:
/* In the 256-bit DFmode case, we can only move elements within
@@ -43797,6 +43851,7 @@ avx_vpermilp_parallel (rtx par, machine_mode mode)
if (ipar[i] + 8 != ipar[i + 8])
return 0;
/* FALLTHRU */
+ gcc_fallthrough ();
case V8SFmode:
/* In 256 bit SFmode case, we have full freedom of
@@ -43807,6 +43862,7 @@ avx_vpermilp_parallel (rtx par, machine_mode mode)
return 0;
nelt = 4;
/* FALLTHRU */
+ gcc_fallthrough ();
case V2DFmode:
case V4SFmode:
@@ -44714,6 +44770,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
return true;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case CONST_VECTOR:
switch (standard_sse_constant_p (x, mode))
@@ -44728,6 +44785,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
return true;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case CONST_WIDE_INT:
/* Fall back to (MEM (SYMBOL_REF)), since that's where
@@ -44773,6 +44831,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
}
}
/* FALLTHRU */
+ gcc_fallthrough ();
case ROTATE:
case ASHIFTRT:
@@ -45024,6 +45083,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
}
}
/* FALLTHRU */
+ gcc_fallthrough ();
case MINUS:
if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
@@ -45044,6 +45104,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
return false;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case AND:
case IOR:
@@ -45059,6 +45120,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
return true;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case NEG:
if (SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH)
@@ -45079,6 +45141,7 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
return false;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case NOT:
if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
@@ -46669,6 +46732,7 @@ ix86_expand_vector_init_duplicate (bool mmx_ok,
machine_mode mode,
if (!mmx_ok)
return false;
/* FALLTHRU */
+ gcc_fallthrough ();
case V4DFmode:
case V4DImode:
@@ -46871,6 +46935,7 @@ ix86_expand_vector_init_one_nonzero (bool mmx_ok,
machine_mode mode,
if (!mmx_ok)
return false;
/* FALLTHRU */
+ gcc_fallthrough ();
case V2DFmode:
case V2DImode:
@@ -46994,6 +47059,7 @@ ix86_expand_vector_init_one_var (bool mmx_ok,
machine_mode mode,
/* Use ix86_expand_vector_set in 64bit mode only. */
if (!TARGET_64BIT)
return false;
+ gcc_fallthrough ();
case V4DFmode:
case V8SFmode:
case V8SImode:
@@ -47336,6 +47402,7 @@ ix86_expand_vector_init_interleave (machine_mode mode,
second_imode = V2DImode;
gen_interleave_second_low = gen_vec_interleave_lowv2di;
/* FALLTHRU */
+ gcc_fallthrough ();
case V2DImode:
op0 = gen_reg_rtx (second_imode);
@@ -47371,6 +47438,7 @@ ix86_expand_vector_init_general (bool mmx_ok,
machine_mode mode,
if (!mmx_ok && !TARGET_SSE)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case V16SImode:
case V16SFmode:
@@ -47448,6 +47516,7 @@ quarter:
if (!TARGET_SSE4_1)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case V8HImode:
if (!TARGET_SSE2)
@@ -47928,6 +47997,7 @@ ix86_expand_vector_extract (bool mmx_ok, rtx target,
rtx vec, int elt)
if (!mmx_ok)
break;
/* FALLTHRU */
+ gcc_fallthrough ();
case V2DFmode:
case V2DImode:
@@ -50006,6 +50076,7 @@ expand_vec_perm_blend (struct expand_vec_perm_d *d)
mask |= (d->perm[i * 2] >= 16) << i;
vmode = V8HImode;
/* FALLTHRU */
+ gcc_fallthrough ();
do_subreg:
target = gen_reg_rtx (vmode);
@@ -52656,6 +52727,7 @@ canonicalize_perm (struct expand_vec_perm_d *d)
of the permutation by folding the permutation into the single
input vector. */
/* FALLTHRU */
+ gcc_fallthrough ();
case 2:
for (i = 0; i < nelt; ++i)
@@ -52945,6 +53017,7 @@ ix86_expand_vecop_qihi (enum rtx_code code, rtx dest,
rtx op1, rtx op2)
case LSHIFTRT:
uns_p = true;
/* FALLTHRU */
+ gcc_fallthrough ();
case ASHIFTRT:
op1_l = gen_reg_rtx (himode);
op1_h = gen_reg_rtx (himode);
@@ -54627,6 +54700,7 @@ ix86_preferred_simd_mode (machine_mode mode)
else if (TARGET_SSE2)
return V2DFmode;
/* FALLTHRU */
+ gcc_fallthrough ();
default:
return word_mode;
diff --git gcc/gcc/config/i386/sse.md gcc/gcc/config/i386/sse.md
index c1ea04f..6b500bc 100644
--- gcc/gcc/config/i386/sse.md
+++ gcc/gcc/config/i386/sse.md
@@ -3185,6 +3185,7 @@
break;
}
/* FALLTHRU */
+ gcc_fallthrough ();
case 1:
ops = "v<logic>%s\t{%%2, %%1, %%0|%%0, %%1, %%2}";
break;
@@ -12221,6 +12222,7 @@
if (GET_MODE_SIZE (<ssescalarmode>mode) < GET_MODE_SIZE (SImode))
return "pinsr<ssemodesuffix>\t{%3, %k2, %0|%0, %k2, %3}";
/* FALLTHRU */
+ gcc_fallthrough ();
case 1:
return "pinsr<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}";
case 2:
@@ -12228,6 +12230,7 @@
if (GET_MODE_SIZE (<ssescalarmode>mode) < GET_MODE_SIZE (SImode))
return "vpinsr<ssemodesuffix>\t{%3, %k2, %1, %0|%0, %1, %k2, %3}";
/* FALLTHRU */
+ gcc_fallthrough ();
case 3:
case 5:
return "vpinsr<ssemodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}";
@@ -13481,6 +13484,7 @@
}
operands[1] = tmp;
/* FALLTHRU */
+ gcc_fallthrough ();
case 32:
tmp = gen_reg_rtx (<ssevecmode>mode);
if (<MODE>mode == SImode)
