Remove aarch64_cannot_change_mode_class as the underlying issue
(PR67609) has been resolved. This avoids a few unnecessary lane
widening operations like:
faddp d18, v18.2d
mov d18, v18.d[0]
Passes regress, OK for commit?
ChangeLog:
2016-05-19 Wilco Dijkstra <wdijk...@arm.com>
* gcc/config/aarch64/aarch64.h
(CANNOT_CHANGE_MODE_CLASS): Remove.
* gcc/config/aarch64/aarch64.c
(aarch64_cannot_change_mode_class): Remove function.
* cc/config/aarch64/aarch64-protos.h
(aarch64_cannot_change_mode_class): Remove.
--
diff --git a/gcc/config/aarch64/aarch64-protos.h
b/gcc/config/aarch64/aarch64-protos.h
index
6a8a850673853a98e12496046ebdcf4a3cd37cf8..1b20cf9da9ef98119315bb7573c161bc71ed00ae
100644
--- a/gcc/config/aarch64/aarch64-protos.h
+++ b/gcc/config/aarch64/aarch64-protos.h
@@ -282,9 +282,6 @@ int aarch64_get_condition_code (rtx);
bool aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode);
int aarch64_branch_cost (bool, bool);
enum aarch64_symbol_type aarch64_classify_symbolic_expression (rtx);
-bool aarch64_cannot_change_mode_class (machine_mode,
- machine_mode,
- enum reg_class);
bool aarch64_const_vec_all_same_int_p (rtx, HOST_WIDE_INT);
bool aarch64_constant_address_p (rtx);
bool aarch64_expand_movmem (rtx *);
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index
6eb31e9537a01881d74e258ce159b5a2fb7e0e6f..8c7f2bde66840139e265b75923b1fcb3336436c5
100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -832,9 +832,6 @@ typedef struct
extern void __aarch64_sync_cache_range (void *, void *); \
__aarch64_sync_cache_range (beg, end)
-#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
- aarch64_cannot_change_mode_class (FROM, TO, CLASS)
-
#define SHIFT_COUNT_TRUNCATED !TARGET_SIMD
/* Choose appropriate mode for caller saves, so we do the minimum
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index
0bfaa2717c7940c08958c47381cd88e09ac28f24..8dec55606e4874c9263416e93c30646c68989261
100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -12640,24 +12640,6 @@ aarch64_vectorize_vec_perm_const_ok (machine_mode
vmode,
return ret;
}
-/* Implement target hook CANNOT_CHANGE_MODE_CLASS. */
-bool
-aarch64_cannot_change_mode_class (machine_mode from,
- machine_mode to,
- enum reg_class rclass)
-{
- /* We cannot allow word_mode subregs of full vector modes.
- Otherwise the middle-end will assume it's ok to store to
- (subreg:DI (reg:TI 100) 0) in order to modify only the low 64 bits
- of the 128-bit register. However, after reload the subreg will
- be dropped leaving a plain DImode store. See PR67609 for a more
- detailed dicussion. In all other cases, we want to be permissive
- and return false. */
- return (reg_classes_intersect_p (FP_REGS, rclass)
- && GET_MODE_SIZE (to) == UNITS_PER_WORD
- && GET_MODE_SIZE (from) > UNITS_PER_WORD);
-}
-
rtx
aarch64_reverse_mask (enum machine_mode mode)
{
