On 04/19/2016 02:19 PM, Michael Matz wrote: > Well, yeah, that's traditional insn caches on multiple cores. From > user space you need kernel help for this, doing interprocess > interrupts to flush all such buffers on all cores (or at least those > potentially fetching stuff in the patched region, if such > granularity is possible). An implementation providing such is > non-broken :)
Sure. If you know of any such facility in Linux userspace, please let me know. :-) But there are ways of doing patching sequences which don't require IPIs across all the cores; which was my point. > Alternatively the various invalidate cache instructions need to have > a form that invalidates the i$ on all cores. I'm fairly sure we haven't got that in the AArch64 architecture. Andrew.
