The following patch fixes
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70398
The patch was successfully tested and bootstrapped on x86_64 and aarch64.
Committed as rev. 234792
Index: ChangeLog
===================================================================
--- ChangeLog (revision 234791)
+++ ChangeLog (working copy)
@@ -1,3 +1,9 @@
+2016-04-06 Vladimir Makarov <vmaka...@redhat.com>
+
+ PR rtl-optimization/70398
+ * lra-constraints.c (process_address_1): Check zero scale and code
+ for reloading with zero scale.
+
2016-04-06 Uros Bizjak <ubiz...@gmail.com>
* config/i386/sse.md (shuffletype): Add V32HI and V4TI modes.
Index: testsuite/ChangeLog
===================================================================
--- testsuite/ChangeLog (revision 234791)
+++ testsuite/ChangeLog (working copy)
@@ -1,3 +1,8 @@
+2016-04-06 Vladimir Makarov <vmaka...@redhat.com>
+
+ PR rtl-optimization/70398
+ * testsuite/gcc.target/aarch64/pr70398.c: New.
+
2016-04-06 Eric Botcazou <ebotca...@adacore.com>
* gcc.c-torture/execute/20101011-1.c (__VISIUM__): Set DO_TEST to 0.
Index: lra-constraints.c
===================================================================
--- lra-constraints.c (revision 234780)
+++ lra-constraints.c (working copy)
@@ -2914,6 +2914,7 @@ process_address_1 (int nop, bool check_o
{
struct address_info ad;
rtx new_reg;
+ HOST_WIDE_INT scale;
rtx op = *curr_id->operand_loc[nop];
const char *constraint = curr_static_id->operand[nop].constraint;
enum constraint_num cn = lookup_constraint (constraint);
@@ -3161,14 +3162,14 @@ process_address_1 (int nop, bool check_o
*ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
new_reg, *ad.index);
}
- else if (get_index_scale (&ad) == 1)
+ else if ((scale = get_index_scale (&ad)) == 1)
{
/* The last transformation to one reg will be made in
curr_insn_transform function. */
end_sequence ();
return false;
}
- else
+ else if (scale != 0)
{
/* base + scale * index => base + new_reg,
case (1) above.
@@ -3180,6 +3181,17 @@ process_address_1 (int nop, bool check_o
*ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
*ad.base_term, new_reg);
}
+ else
+ {
+ enum reg_class cl = base_reg_class (ad.mode, ad.as,
+ SCRATCH, SCRATCH);
+ rtx addr = *ad.inner;
+
+ new_reg = lra_create_new_reg (Pmode, NULL_RTX, cl, "addr");
+ /* addr => new_base. */
+ lra_emit_move (new_reg, addr);
+ *ad.inner = new_reg;
+ }
*before = get_insns ();
end_sequence ();
return true;
Index: testsuite/gcc.target/aarch64/pr70398.c
===================================================================
--- testsuite/gcc.target/aarch64/pr70398.c (revision 0)
+++ testsuite/gcc.target/aarch64/pr70398.c (working copy)
@@ -0,0 +1,26 @@
+/* { dg-do run } */
+/* { dg-options "-O -fno-tree-loop-optimize -fno-tree-ter -static" } */
+unsigned int in[8 * 8] =
+ { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
+ 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63 };
+
+unsigned char out[8 * 8];
+
+int
+main (void)
+{
+ int i;
+ for (i = 0; i < 8 * 4; i++)
+ {
+ out[i * 2] = (unsigned char) in[i * 2] + 1;
+ out[i * 2 + 1] = (unsigned char) in[i * 2 + 1] + 2;
+ }
+ __asm__("":::"memory");
+ for (i = 0; i < 8 * 4; i++)
+ {
+ if (out[i * 2] != in[i * 2] + 1
+ || out[i * 2 + 1] != in[i * 2 + 1] + 2)
+ __builtin_abort ();
+ }
+ return 0;
+}
