On Wed, Feb 03, 2016 at 01:02:57PM -0500, Vladimir Makarov wrote:
>   The following patch fixes
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69461
> 
>   The patch actually solves several issues.  Before the patch LRA
> has >800 more failures on GCC testsuite on power8.  After the patch
> the LRA has the same number of failures as reload.
> 
> Working on the patch, I think I found some typo in
> rs6000.c::rs6000_legitimate_address_p.  The code suspicious to me:
> 
>   if (reg_offset_p && reg_addr[mode].fused_toc &&
> toc_fusion_mem_wrapped (x, mode))
>     return 1;
> 
> The function works with address (x) but toc_fusion_mem_wrapped
> requires memory instead of address.  Therefore the function never
> returns 1 for toc_fusion_wrapped address.
> 
> Mike and Peter, what do you think about this code?
> 
> Anyway, the patch was successfully bootstrapped and tested on power8.
> 
> Committed as rev..

It looks like it would solve the problem (not knowing the inner details of
lra).

You are correct about the call to toc_fusion_wrapped expecting a MEM, and
rs6000_legitimate_address_p was pass the address.

We are testing the following patch to fix this:

2016-02-03  Michael Meissner  <meiss...@linux.vnet.ibm.com>
            Vladimir Makarov  <vmaka...@redhat.com>

        * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Fix thinko
        in validating fused toc addresses.

Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c  (revision 233107)
+++ gcc/config/rs6000/rs6000.c  (working copy)
@@ -8399,7 +8399,8 @@ rs6000_legitimate_address_p (machine_mod
       && legitimate_constant_pool_address_p (x, mode,
                                             reg_ok_strict || lra_in_progress))
     return 1;
-  if (reg_offset_p && reg_addr[mode].fused_toc && toc_fusion_mem_wrapped (x, 
mode))
+  if (reg_offset_p && reg_addr[mode].fused_toc && GET_CODE (x) == UNSPEC
+      && XINT (x, 1) == UNSPEC_FUSION_ADDIS)
     return 1;
   /* For TImode, if we have load/store quad and TImode in VSX registers, only
      allow register indirect addresses.  This will allow the values to go in

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797

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