On Thu, Jan 21, 2016 at 12:32:07PM +0000, James Greenhalgh wrote: > On Wed, Jan 13, 2016 at 05:44:30PM +0000, Bilyan Borisov wrote: > > This patch implements all the vcvtR_s64_f64 and vcvtR_u64_f64 vector > > intrinsics, where R is ['',a,m,n,p]. Since these intrinsics are > > identical in semantics to the corresponding scalar variants, they are > > implemented in terms of them, with appropriate packing and unpacking > > of vector arguments. New test cases, covering all the intrinsics were > > also added. > > This patch is very low risk, gets us another step towards closing pr58693, > and was posted before the Stage 3 deadline. This is OK for trunk.
I realised you don't have commit access, so I've committed this on your behalf as revision 232789. Thanks, James > > gcc/ > > > > 2015-XX-XX Bilyan Borisov <bilyan.bori...@arm.com> > > > > * config/aarch64/arm_neon.h (vcvt_s64_f64): New intrinsic. > > (vcvt_u64_f64): Likewise. > > (vcvta_s64_f64): Likewise. > > (vcvta_u64_f64): Likewise. > > (vcvtm_s64_f64): Likewise. > > (vcvtm_u64_f64): Likewise. > > (vcvtn_s64_f64): Likewise. > > (vcvtn_u64_f64): Likewise. > > (vcvtp_s64_f64): Likewise. > > (vcvtp_u64_f64): Likewise. > > > > gcc/testsuite/ > > > > 2015-XX-XX Bilyan Borisov <bilyan.bori...@arm.com> > > > > * gcc.target/aarch64/simd/vcvt_s64_f64_1.c: New. > > * gcc.target/aarch64/simd/vcvt_u64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvta_s64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvta_u64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvtm_s64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvtm_u64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvtn_s64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvtn_u64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvtp_s64_f64_1.c: Likewise. > > * gcc.target/aarch64/simd/vcvtp_u64_f64_1.c: Likewise. >
