Hi! On Tue, 5 Jan 2016 09:22:46 -0500, Nathan Sidwell <nat...@acm.org> wrote: > This patch merges my most recent sequence of ptx backend changes to the > gomp4 > branch.
I suppose it's not been intentional that during that, you dropped some of the changes present on gomp-4_0-branch, once installed for "[gomp4] Basic -misa support for nvptx", <http://news.gmane.org/find-root.php?message_id=%3C87lhgsjhf9.fsf%40schwinge.name%3E>? In gomp-4_0-branch r232224, I restored that code (untested) as follows: commit 7cc2a8ac6cd0e07725a1654317e70ef43cceda8a Author: tschwinge <tschwinge@138bc75d-0d04-0410-961f-82ee72b054a4> Date: Mon Jan 11 12:17:15 2016 +0000 Restore basic -misa support for nvptx gcc/ * config/nvptx/nvptx.h (ASM_SPEC): Define. * config/nvptx/nvptx.md (atomic_fetch_<logic><mode>): Enable conditionally. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gomp-4_0-branch@232224 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog.gomp | 6 ++++++ gcc/config/nvptx/nvptx.h | 2 ++ gcc/config/nvptx/nvptx.md | 3 +-- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git gcc/ChangeLog.gomp gcc/ChangeLog.gomp index 1f386bb..f55f87c 100644 --- gcc/ChangeLog.gomp +++ gcc/ChangeLog.gomp @@ -1,3 +1,9 @@ +2016-01-11 Thomas Schwinge <tho...@codesourcery.com> + + * config/nvptx/nvptx.h (ASM_SPEC): Define. + * config/nvptx/nvptx.md (atomic_fetch_<logic><mode>): Enable + conditionally. + 2016-01-08 Cesar Philippidis <ce...@codesourcery.com> * lto-cgraph.c (input_varpool_node): Reduce the assert for diff --git gcc/config/nvptx/nvptx.h gcc/config/nvptx/nvptx.h index a954252..9863f16 100644 --- gcc/config/nvptx/nvptx.h +++ gcc/config/nvptx/nvptx.h @@ -29,6 +29,8 @@ #define STARTFILE_SPEC "%{mmainkernel:crt0.o}" +#define ASM_SPEC "%{misa=*:-m %*}" + #define TARGET_CPU_CPP_BUILTINS() \ do \ { \ diff --git gcc/config/nvptx/nvptx.md gcc/config/nvptx/nvptx.md index 33a4862..3c882cb 100644 --- gcc/config/nvptx/nvptx.md +++ gcc/config/nvptx/nvptx.md @@ -1215,7 +1215,6 @@ (define_code_iterator any_logic [and ior xor]) (define_code_attr logic [(and "and") (ior "or") (xor "xor")]) -;; Currently disabled until we add better subtarget support - requires sm_32. (define_insn "atomic_fetch_<logic><mode>" [(set (match_operand:SDIM 1 "memory_operand" "+m") (unspec_volatile:SDIM @@ -1225,7 +1224,7 @@ UNSPECV_LOCK)) (set (match_operand:SDIM 0 "nvptx_register_operand" "=R") (match_dup 1))] - "0" + "<MODE>mode == SImode || TARGET_SM35" "%.\\tatom%A1.b%T0.<logic>\\t%0, %1, %2;") (define_insn "nvptx_barsync" Grüße Thomas
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