PowerPC was missing a definition of the lroundMN pattern, which can be
implemented with VSX instructions available in Power7. Below is a
first draft.
- David
* config/rs6000/rs6000.md (*xsrdpidf2): New define_insn.
(lrounddfdi2): New define_expand.
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 8c53c40..eadbe1d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -77,6 +77,7 @@
UNSPEC_FRIN
UNSPEC_FRIP
UNSPEC_FRIZ
+ UNSPEC_XSRDPI
UNSPEC_LD_MPIC ; load_macho_picbase
UNSPEC_RELD_MPIC ; re-load_macho_picbase
UNSPEC_MPIC_CORRECT ; macho_correct_pic
@@ -5245,6 +5246,27 @@
[(set_attr "type" "fp")
(set_attr "fp_type" "fp_addsub_<Fs>")])
+(define_insn "*xsrdpidf2"
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=<Fv>")
+ (unspec:DF [(match_operand:DF 1 "gpc_reg_operand" "<Fv>")]
+ UNSPEC_XSRDPI))]
+ "TARGET_DF_FPR && TARGET_POPCNTD"
+ "xsrdpi %0,%1"
+ [(set_attr "type" "fp")])
+
+(define_expand "lrounddfdi2"
+ [(set (match_dup 2)
+ (unspec:DF [(match_operand:DF 1 "gpc_reg_operand" "<Fv>")]
+ UNSPEC_XSRDPI))
+ (set (match_operand:DI 0 "gpc_reg_operand" "=d")
+ (unspec:DI [(match_dup 2)]
+ UNSPEC_FCTID))]
+ "TARGET_DF_FPR && TARGET_POPCNTD
+ && flag_unsafe_math_optimizations && !flag_trapping_math"
+{
+ operands[2] = gen_reg_rtx (DFmode);
+})
+
; An UNSPEC is used so we don't have to support SImode in FP registers.
(define_insn "stfiwx"
[(set (match_operand:SI 0 "memory_operand" "=Z")
