Hi all,
The ICE in this PR (reduced from LLVM) occurs because the atomic_load builtin
expansion ends up calling
expand_atomic_compare_and_swap without caring about the result. The convention
in the optabs/builtin machinery
is to use const0_rtx for the target destination when that is the case.
However, expand_atomic_compare_and_swap didn't check for that, only for the
case where the pointer to the target
is NULL. This patch fixes that by handling the case where the ptarget_oval and
ptarget_bool pointers are not-NULL
but contain const0_rtx.
N.B. This is one of the fallback paths for expanding atomic_load when the
target doesn't provide expanders for it,
like the arm target with -march=armv4t.
Bootstrapped and tested on arm-none-linux-gnueabihf, aarch64-linux-gnu,
x86_64-unknown-linux-gnu.
This ICE appears on the GCC 5 and GCC 4.9 branch.
I'll be bootstrapping and testing this patch on those branches.
Meanwhile, is this ok for trunk?
Thanks,
Kyrill
2015-10-22 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
PR middle-end/67989
* optabs.c (expand_atomic_compare_and_swap): Handle case when
ptarget_oval or ptarget_bool are const0_rtx.
2015-10-22 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
PR middle-end/67989
* g++.dg/pr67989.C: New test.
commit 91e5931f48da3377684328b5c00ce4c46ff82365
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date: Thu Oct 22 14:21:28 2015 +0100
[optabs.c] Fix PR 67989: Handle const0_rtx target in expand_atomic_compare_and_swap
diff --git a/gcc/optabs.c b/gcc/optabs.c
index 950ee3c..acb3120 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -5852,9 +5852,9 @@ expand_atomic_exchange (rtx target, rtx mem, rtx val, enum memmodel model)
*PTARGET_BOOL is an optional place to store the boolean success/failure.
*PTARGET_OVAL is an optional place to store the old value from memory.
- Both target parameters may be NULL to indicate that we do not care about
- that return value. Both target parameters are updated on success to
- the actual location of the corresponding result.
+ Both target parameters may be NULL or const0_rtx to indicate that we do
+ not care about that return value. Both target parameters are updated on
+ success to the actual location of the corresponding result.
MEMMODEL is the memory model variant to use.
@@ -5879,6 +5879,9 @@ expand_atomic_compare_and_swap (rtx *ptarget_bool, rtx *ptarget_oval,
/* Make sure we always have some place to put the return oldval.
Further, make sure that place is distinct from the input expected,
just in case we need that path down below. */
+ if (ptarget_oval && *ptarget_oval == const0_rtx)
+ ptarget_oval = NULL;
+
if (ptarget_oval == NULL
|| (target_oval = *ptarget_oval) == NULL
|| reg_overlap_mentioned_p (expected, target_oval))
@@ -5889,6 +5892,9 @@ expand_atomic_compare_and_swap (rtx *ptarget_bool, rtx *ptarget_oval,
{
machine_mode bool_mode = insn_data[icode].operand[0].mode;
+ if (ptarget_bool && *ptarget_bool == const0_rtx)
+ ptarget_bool = NULL;
+
/* Make sure we always have a place for the bool operand. */
if (ptarget_bool == NULL
|| (target_bool = *ptarget_bool) == NULL
diff --git a/gcc/testsuite/g++.dg/pr67989.C b/gcc/testsuite/g++.dg/pr67989.C
new file mode 100644
index 0000000..90261c4
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr67989.C
@@ -0,0 +1,75 @@
+/* { dg-do compile } */
+/* { dg-options "-std=c++11 -O2" } */
+/* { dg-additional-options "-marm -march=armv4t" { target arm*-*-* } } */
+
+__extension__ typedef unsigned long long int uint64_t;
+namespace std __attribute__ ((__visibility__ ("default")))
+{
+ typedef enum memory_order
+ {
+ memory_order_seq_cst
+ } memory_order;
+}
+
+namespace std __attribute__ ((__visibility__ ("default")))
+{
+ template < typename _Tp > struct atomic
+ {
+ static constexpr int _S_min_alignment
+ = (sizeof (_Tp) & (sizeof (_Tp) - 1)) || sizeof (_Tp) > 16
+ ? 0 : sizeof (_Tp);
+ static constexpr int _S_alignment
+ = _S_min_alignment > alignof (_Tp) ? _S_min_alignment : alignof (_Tp);
+ alignas (_S_alignment) _Tp _M_i;
+ operator _Tp () const noexcept
+ {
+ return load ();
+ }
+ _Tp load (memory_order __m = memory_order_seq_cst) const noexcept
+ {
+ _Tp tmp;
+ __atomic_load (&_M_i, &tmp, __m);
+ }
+ };
+}
+
+namespace lldb_private
+{
+ namespace imp
+ {
+ }
+ class Address;
+}
+namespace lldb
+{
+ typedef uint64_t addr_t;
+ class SBSection
+ {
+ };
+ class SBAddress
+ {
+ void SetAddress (lldb::SBSection section, lldb::addr_t offset);
+ lldb_private::Address & ref ();
+ };
+}
+namespace lldb_private
+{
+ class Address
+ {
+ public:
+ const Address & SetOffset (lldb::addr_t offset)
+ {
+ bool changed = m_offset != offset;
+ }
+ std::atomic < lldb::addr_t > m_offset;
+ };
+}
+
+using namespace lldb;
+using namespace lldb_private;
+void
+SBAddress::SetAddress (lldb::SBSection section, lldb::addr_t offset)
+{
+ Address & addr = ref ();
+ addr.SetOffset (offset);
+}
