[mask-load, patch 2/2, i386] Add/modify mask load/store patterns

[Ilya Enkovich]

Hi,

This patch reflects changes in maskload and maskstore optabs and adds patterns 
for AVX-512.

Thanks,
Ilya
--
2015-10-08  Ilya Enkovich  <enkovich....@gmail.com>

        * config/i386/sse.md (maskload<mode>): Rename to ...
        (maskload<mode><sseintvecmodelower>): ... this.
        (maskstore<mode>): Rename to ...
        (maskstore<mode><sseintvecmodelower>): ... this.
        (maskload<mode><avx512fmaskmodelower>): New.
        (maskstore<mode><avx512fmaskmodelower>): New.


diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 3a9d2d3..48424fc 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -18153,7 +18153,7 @@
    (set_attr "btver2_decode" "vector") 
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_expand "maskload<mode>"
+(define_expand "maskload<mode><sseintvecmodelower>"
   [(set (match_operand:V48_AVX2 0 "register_operand")
        (unspec:V48_AVX2
          [(match_operand:<sseintvecmode> 2 "register_operand")
@@ -18161,7 +18161,23 @@
          UNSPEC_MASKMOV))]
   "TARGET_AVX")
 
-(define_expand "maskstore<mode>"
+(define_expand "maskload<mode><avx512fmaskmodelower>"
+  [(set (match_operand:V48_AVX512VL 0 "register_operand")
+       (vec_merge:V48_AVX512VL
+         (match_operand:V48_AVX512VL 1 "memory_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512F")
+
+(define_expand "maskload<mode><avx512fmaskmodelower>"
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand")
+       (vec_merge:VI12_AVX512VL
+         (match_operand:VI12_AVX512VL 1 "memory_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512BW")
+
+(define_expand "maskstore<mode><sseintvecmodelower>"
   [(set (match_operand:V48_AVX2 0 "memory_operand")
        (unspec:V48_AVX2
          [(match_operand:<sseintvecmode> 2 "register_operand")
@@ -18170,6 +18186,22 @@
          UNSPEC_MASKMOV))]
   "TARGET_AVX")
 
+(define_expand "maskstore<mode><avx512fmaskmodelower>"
+  [(set (match_operand:V48_AVX512VL 0 "memory_operand")
+       (vec_merge:V48_AVX512VL
+         (match_operand:V48_AVX512VL 1 "register_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512F")
+
+(define_expand "maskstore<mode><avx512fmaskmodelower>"
+  [(set (match_operand:VI12_AVX512VL 0 "memory_operand")
+       (vec_merge:VI12_AVX512VL
+         (match_operand:VI12_AVX512VL 1 "register_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512BW")
+
 (define_insn_and_split "avx_<castmode><avxsizesuffix>_<castmode>"
   [(set (match_operand:AVX256MODE2P 0 "nonimmediate_operand" "=x,m")
        (unspec:AVX256MODE2P