http://gcc.gnu.org/ml/gcc-patches/2011-07/msg02424.html

Richard Henderson wrote:
> On 07/27/2011 09:12 AM, Georg-Johann Lay wrote:
>>      PR target/49313
>>      * config/avr/libgcc.S (__ffshi2): Don't skip 2-word instruction.
>>      (__ctzsi2): Result for 0 may be undefined.
>>      (__ctzhi2): Result for 0 may be undefined.
>>      (__popcounthi2): Don't clobber r30. Use __popcounthi2_tail.
>>      (__popcountsi2): Ditto. And don't clobber r26.
>>      (__popcountdi2): Ditto. And don't clobber r27.
>>      * config/avr/avr.md (UNSPEC_COPYSIGN): New c_enum.
>>      (parityhi2): New expand.
>>      (paritysi2): New expand.
>>      (popcounthi2): New expand.
>>      (popcountsi2): New expand.
>>      (clzhi2): New expand.
>>      (clzsi2): New expand.
>>      (ctzhi2): New expand.
>>      (ctzsi2): New expand.
>>      (ffshi2): New expand.
>>      (ffssi2): New expand.
>>      (copysignsf2): New insn.
>>      (bswapsi2): New expand.
>>      (*parityhi2.libgcc): New insn.
>>      (*parityqihi2.libgcc): New insn.
>>      (*paritysihi2.libgcc): New insn.
>>      (*popcounthi2.libgcc): New insn.
>>      (*popcountsi2.libgcc): New insn.
>>      (*popcountqi2.libgcc): New insn.
>>      (*popcountqihi2.libgcc): New insn-and-split.
>>      (*clzhi2.libgcc): New insn.
>>      (*clzsihi2.libgcc): New insn.
>>      (*ctzhi2.libgcc): New insn.
>>      (*ctzsihi2.libgcc): New insn.
>>      (*ffshi2.libgcc): New insn.
>>      (*ffssihi2.libgcc): New insn.
>>      (*bswapsi2.libgcc): New insn.
> 
> Looks good.
> 
> 
> r~

http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=176920

Committed with the following changes imposed by
   http://gcc.gnu.org/viewcvs?view=revision&revision=176862
i.e. don't generate zero_extends with hard register and replace

(define_expand ...
...
   (set (match_operand:SI 0 "register_operand" "")
        (zero_extend:SI (reg:HI 24)))]
  ""
  "")

with

(define_expand ...
...
   (set (match_dup 2)
        (reg:HI 24))
   (set (match_operand:SI 0 "register_operand" "")
        (zero_extend:SI (match_dup 2)))]
  ""
  {
    operands[2] = gen_reg_rtx (HImode);
  })

Replacing explicit hard registers in expanders/splits with
insns that have corresponding hard register constraints lead
to extraordinary bad code, see
   http://gcc.gnu.org/ml/gcc-patches/2011-07/msg02412.html
and the following discussion.  Unfortunately, the relevant post
didn't show up in the mail archives yet (since 24 hours now) so
I cannot link it, but obviously Richard received it as he answered
to it.

Passed without regressions.

Johann

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