On 9 September 2015 at 10:31, James Greenhalgh <james.greenha...@arm.com> wrote: > > Hi, > > This patch clears up some remaining confusion in the vector lane orderings > for the two intrinsics mentioned in the title. > > Bootstrapped on aarch64-none-linux-gnu and regression tested for > aarch64_be-none-elf with no issues. >
Does this actually fix an existing testcase? > OK? > > Thanks, > James > > --- > 2015-09-09 James Greenhalgh <james.greenha...@arm.com> > > * config/aarch64/aarch64-simd.md (vec_unpacks_lo_v4sf): Rewrite > as an expand. > (vec_unpacks_hi_v4sf): Likewise. > (aarch64_float_extend_lo_v2df): Rename to... > (aarch64_fcvtl_v4sf): This. > (aarch64_fcvtl2_v4sf): New. > (aarch64_float_truncate_hi_v4sf): Rewrite as an expand. > (aarch64_float_truncate_hi_v4sf_le): New. > (aarch64_float_truncate_hi_v4sf_be): Likewise. >
