The "*and<mode>3_imm_dot_shifted" pattern is a define_insn_and_split,
like most "dot" patterns: if its output is not assigned cr0 but some
other cr reg, it splits to a non-dot insn and a compare.

Unfortunately that non-dot insn will clobber cr0 as well.  We could
add another clobber (with "=X,x"), but then that second alternative
is never useful; instead, just remove that second alternative.

Bootstrapped and tested on powerpc64-linux; is this okay for trunk?


Segher


2015-08-25  Segher Boessenkool  <seg...@kernel.crashing.org>

        PR target/67344
        * config/rs6000/rs6000.md (*and<mode>3_imm_dot_shifted): Change to
        a define_insn, remove second alternative.

---
 gcc/config/rs6000/rs6000.md | 29 ++++++++---------------------
 1 file changed, 8 insertions(+), 21 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 527ad98..2138184 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -3037,15 +3037,15 @@ (define_insn_and_split "*and<mode>3_imm_mask_dot2"
    (set_attr "dot" "yes")
    (set_attr "length" "4,8")])
 
-(define_insn_and_split "*and<mode>3_imm_dot_shifted"
-  [(set (match_operand:CC 3 "cc_reg_operand" "=x,?y")
+(define_insn "*and<mode>3_imm_dot_shifted"
+  [(set (match_operand:CC 3 "cc_reg_operand" "=x")
        (compare:CC
          (and:GPR
-           (lshiftrt:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r,r")
-                         (match_operand:SI 4 "const_int_operand" "n,n"))
-           (match_operand:GPR 2 "const_int_operand" "n,n"))
+           (lshiftrt:GPR (match_operand:GPR 1 "gpc_reg_operand" "%r")
+                         (match_operand:SI 4 "const_int_operand" "n"))
+           (match_operand:GPR 2 "const_int_operand" "n"))
          (const_int 0)))
-   (clobber (match_scratch:GPR 0 "=r,r"))]
+   (clobber (match_scratch:GPR 0 "=r"))]
   "logical_const_operand (GEN_INT (UINTVAL (operands[2])
                                   << INTVAL (operands[4])),
                          DImode)
@@ -3054,23 +3054,10 @@ (define_insn_and_split "*and<mode>3_imm_dot_shifted"
    && rs6000_gen_cell_microcode"
 {
   operands[2] = GEN_INT (UINTVAL (operands[2]) << INTVAL (operands[4]));
-  if (which_alternative == 0)
-    return "andi%e2. %0,%1,%u2";
-  else
-    return "#";
+  return "andi%e2. %0,%1,%u2";
 }
-  "&& reload_completed && cc_reg_not_cr0_operand (operands[3], CCmode)"
-  [(set (match_dup 0)
-       (and:GPR (lshiftrt:GPR (match_dup 1)
-                              (match_dup 4))
-                (match_dup 2)))
-   (set (match_dup 3)
-       (compare:CC (match_dup 0)
-                   (const_int 0)))]
-  ""
   [(set_attr "type" "logical")
-   (set_attr "dot" "yes")
-   (set_attr "length" "4,8")])
+   (set_attr "dot" "yes")])
 
 
 (define_insn "and<mode>3_mask"
-- 
1.8.1.4

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