On Tue, Aug 18, 2015 at 02:49:30PM +0200, Ulrich Weigand wrote:
> Dominik Vogt wrote:
>
> > The attached patch fixes the vec_load_bndry builtin on S390. The second
> > argument must be one of 64, 128, 256, ..., 4096, but the table expected that
> > value to fit into 3 bits.
>
> Makes sense. However, I'd really like to see a testcase that verifies
> we're accepting the correct values and generate correct assembler ...
Sure; updated patch atteched.
Ciao
Dominik ^_^ ^_^
--
Dominik Vogt
IBM Germany
>From 689f07b5c98be80cf437981c2cffe20d3c339f57 Mon Sep 17 00:00:00 2001
From: Dominik Vogt <v...@linux.vnet.ibm.com>
Date: Tue, 18 Aug 2015 13:11:08 +0100
Subject: [PATCH] S390: Fix vec_load_bndry.
In one place it required 64, 128, ..., 4096 as the second argument and in
another place it required that value to fit into three bits.
---
gcc/config/s390/s390-builtins.def | 18 ++---
.../gcc.target/s390/zvector/vec-load_bndry-1.c | 80 ++++++++++++++++++++++
2 files changed, 89 insertions(+), 9 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c
diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index 9b11e41..3250eef 100644
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -447,15 +447,15 @@ B_DEF (s390_vllezf, vec_insert_and_zerov4si,0,
B_DEF (s390_vllezg, vec_insert_and_zerov2di,0, B_VX, 0, BT_FN_UV2DI_ULONGLONGCONSTPTR)
OB_DEF (s390_vec_load_bndry, s390_vec_load_bndry_s8,s390_vec_load_bndry_dbl,B_VX, BT_FN_OV4SI_INTCONSTPTR_INT)
-OB_DEF_VAR (s390_vec_load_bndry_s8, s390_vlbb, O2_U3, BT_OV_V16QI_SCHARCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u8, s390_vlbb, O2_U3, BT_OV_UV16QI_UCHARCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_s16, s390_vlbb, O2_U3, BT_OV_V8HI_SHORTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u16, s390_vlbb, O2_U3, BT_OV_UV8HI_USHORTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_s32, s390_vlbb, O2_U3, BT_OV_V4SI_INTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u32, s390_vlbb, O2_U3, BT_OV_UV4SI_UINTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_s64, s390_vlbb, O2_U3, BT_OV_V2DI_LONGLONGCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u64, s390_vlbb, O2_U3, BT_OV_UV2DI_ULONGLONGCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_dbl, s390_vlbb, O2_U3, BT_OV_V2DF_DBLCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s8, s390_vlbb, O2_U16, BT_OV_V16QI_SCHARCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u8, s390_vlbb, O2_U16, BT_OV_UV16QI_UCHARCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s16, s390_vlbb, O2_U16, BT_OV_V8HI_SHORTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u16, s390_vlbb, O2_U16, BT_OV_UV8HI_USHORTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s32, s390_vlbb, O2_U16, BT_OV_V4SI_INTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u32, s390_vlbb, O2_U16, BT_OV_UV4SI_UINTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s64, s390_vlbb, O2_U16, BT_OV_V2DI_LONGLONGCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u64, s390_vlbb, O2_U16, BT_OV_UV2DI_ULONGLONGCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_dbl, s390_vlbb, O2_U16, BT_OV_V2DF_DBLCONSTPTR_USHORT)
B_DEF (s390_vlbb, vlbb, 0, B_VX, O2_U3, BT_FN_UV16QI_UCHARCONSTPTR_USHORT)
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c b/gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c
new file mode 100644
index 0000000..9ebf6c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c
@@ -0,0 +1,80 @@
+/* { dg-do compile { target { s390*-*-* } } } */
+/* { dg-options "-O0 -mzarch -march=z13 -mzvector" } */
+
+#include <vecintrin.h>
+
+signed char
+foo64 (signed char *p)
+{
+ return vec_load_bndry (p, 64)[0];
+ /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),0" 1 } } */
+}
+
+signed char
+foo128 (signed char *p)
+{
+ return
+ vec_load_bndry (p, 128)[0]
+ + vec_load_bndry (p + 16, 128)[0];
+ /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),1" 2 } } */
+}
+
+signed char
+foo256 (signed char *p)
+{
+ return
+ vec_load_bndry (p, 256)[0]
+ + vec_load_bndry (p + 16, 256)[0]
+ + vec_load_bndry (p + 32, 256)[0];
+ /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),2" 3 } } */
+}
+
+signed char
+foo512 (signed char *p)
+{
+ return
+ vec_load_bndry (p, 512)[0]
+ + vec_load_bndry (p + 16, 512)[0]
+ + vec_load_bndry (p + 32, 512)[0]
+ + vec_load_bndry (p + 48, 512)[0];
+ /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),3" 4 } } */
+}
+
+signed char
+foo1024 (signed char *p)
+{
+ return
+ vec_load_bndry (p, 1024)[0]
+ + vec_load_bndry (p + 16, 1024)[0]
+ + vec_load_bndry (p + 32, 1024)[0]
+ + vec_load_bndry (p + 48, 1024)[0]
+ + vec_load_bndry (p + 64, 1024)[0];
+ /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),4" 5 } } */
+}
+
+signed char
+foo2048 (signed char *p)
+{
+ return
+ vec_load_bndry (p, 2048)[0]
+ + vec_load_bndry (p + 16, 2048)[0]
+ + vec_load_bndry (p + 32, 2048)[0]
+ + vec_load_bndry (p + 48, 2048)[0]
+ + vec_load_bndry (p + 64, 2048)[0]
+ + vec_load_bndry (p + 80, 2048)[0];
+ /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),5" 6 } } */
+}
+
+signed char
+foo4096 (signed char *p)
+{
+ return
+ vec_load_bndry (p, 4096)[0]
+ + vec_load_bndry (p + 16, 4096)[0]
+ + vec_load_bndry (p + 32, 4096)[0]
+ + vec_load_bndry (p + 48, 4096)[0]
+ + vec_load_bndry (p + 64, 4096)[0]
+ + vec_load_bndry (p + 80, 4096)[0]
+ + vec_load_bndry (p + 96, 4096)[0];
+ /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),6" 7 } } */
+}
--
2.3.0
gcc/ChangeLog
* config/s390/s390-builtins.def: Fix value range of vec_load_bndry.
gcc/testsuite/ChangeLog
* gcc.target/s390/zvector/vec-load_bndry-1.c: New test.
