Thanks Uros. Will it be fine for you if I split core2.md to instruction reservation definition for core2 (old core2.md got old cpu core2) and new nehalem.md (my changes for core2.md but for cpu nehalem only)?
Thanks. Yuri. 2015-08-14 13:20 GMT+03:00 Uros Bizjak <ubiz...@gmail.com>: > On Fri, Aug 14, 2015 at 11:44 AM, Yuri Rumyantsev <ysrum...@gmail.com> wrote: >> Hi All, >> >> Here is patch which contains >> (1) modifying of core2.md to conform Haswell pipeline and adding of >> missed instruction reservation for instructions with vector operands. >> (2) increase reassociation width for float-point operations for >> Haswell family and 64-bit target, this allows to get +10% speedup on >> spec2006/410.bwaves for Skylake processor. >> >> Bootstrap and regression testing did not show any new failures. >> Is it OK for trunk? >> >> ChangeLog: >> 2015-08-14 Yuri Rumyantsev <ysrum...@gmail.com> >> >> * config/i386/core2.md: Confrom instruction reservation to Haswell >> pipeline. >> * config/i386/i386.c (ix86_reassociation_width): Increase reassociation >> width for float-point operations. > > The i386.c change is OK. > > Other that this, your patch substantially changes core2.md, and I'm > afraid this would hurt pipeline description of older processors. IMO, > it is better to introduce new haswell.md file and put the whole > haswell description here. > > Uros.
