Hi,
The lo register is not listed in the clobber list in the inline asm statement
for the madd-8.c and msub-8.c testcases. This means that when building for the
n64 ABI GCC is free to use the lo register instead of the stack when
saving/restoring
the clobbered registers. Then then means that it decides to use the msub/madd
instruction to perform the "x - y * z" operation rather than using mul;
addu/subu
which the test is looking for.
The following patch therefore adds the lo register to the clobber list
for the madd-8.c and msub-8.c testcases. The patch has been tested on the
mti/img elf/linux-gnu toolchains, and there have been no new regressions.
The patch and ChangeLog are below.
Ok to commit?
Many thanks,
Andrew
testsuite/
gcc.target/mips/madd-8.c: Add lo register to clobber list.
gcc.target/mips/msub-8.c: Ditto
diff --git a/gcc/testsuite/gcc.target/mips/madd-8.c
b/gcc/testsuite/gcc.target/mips/madd-8.c
index 794a6ff..56c1947 100644
--- a/gcc/testsuite/gcc.target/mips/madd-8.c
+++ b/gcc/testsuite/gcc.target/mips/madd-8.c
@@ -11,6 +11,6 @@ f2 (int x, int y, int z)
asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9",
"$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17",
"$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25",
- "$31");
+ "$31", "lo");
return x * y + z;
}
diff --git a/gcc/testsuite/gcc.target/mips/msub-8.c
b/gcc/testsuite/gcc.target/mips/msub-8.c
index a66307f..b0f1523 100644
--- a/gcc/testsuite/gcc.target/mips/msub-8.c
+++ b/gcc/testsuite/gcc.target/mips/msub-8.c
@@ -11,6 +11,6 @@ f2 (int x, int y, int z)
asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9",
"$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17",
"$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25",
- "$31");
+ "$31", "lo");
return x - y * z;
}
