Hi,
The attached patch fixes an ICE (unrecognizable insn) when accumulators are
used in interrupt handlers for MIPS64R2. There was just a typo in the function
name.
Ok to apply?
Regards,
Robert
gcc/
* config/mips/mips.c (mips_emit_save_slot_move): Fix typo.
gcc/testsuite/
* gcc.target/mips/20150707.c: New test.
---
gcc/config/mips/mips.c | 2 +-
gcc/testsuite/gcc.target/mips/20150707.c | 7 +++++++
2 files changed, 8 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/mips/20150707.c
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index ef8b0c7..1f247cf 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -10961,7 +10961,7 @@ mips_emit_save_slot_move (rtx dest, rtx src, rtx temp)
{
mips_emit_move (temp, src);
if (TARGET_64BIT)
- emit_insn (gen_mthisi_di (gen_rtx_REG (TImode, MD_REG_FIRST),
+ emit_insn (gen_mthidi_ti (gen_rtx_REG (TImode, MD_REG_FIRST),
temp, gen_rtx_REG (DImode, LO_REGNUM)));
else
emit_insn (gen_mthisi_di (gen_rtx_REG (DImode, MD_REG_FIRST),
diff --git a/gcc/testsuite/gcc.target/mips/20150707.c
b/gcc/testsuite/gcc.target/mips/20150707.c
new file mode 100644
index 0000000..434b3b8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/20150707.c
@@ -0,0 +1,7 @@
+/* { dg-do assemble } */
+/* { dg-options "-mips64r2" } */
+_Accum a;
+__attribute__((interrupt))
+void foo () {
+ a = a*a;
+}
--
2.2.2
